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Author

Hirofumi Sumi

Bio: Hirofumi Sumi is an academic researcher from Sony Broadcast & Professional Research Laboratories. The author has contributed to research in topics: Image sensor & Layer (electronics). The author has an hindex of 18, co-authored 74 publications receiving 1128 citations.


Papers
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Patent
29 Jul 1994
TL;DR: In this article, a metallization method in which a fine interconnection hole is filled with an Al-based material and in which low resistance and excellent barrier properties may be achieved simultaneously, is proposed.
Abstract: A metallization method in which a fine interconnection hole is filled with an Al-based material and in which low resistance and excellent barrier properties may be achieved simultaneously, is proposed. The present invention resides in improvement in the barrier metal structure. (a) A stack of a TiSi2 layer and a Ti layer, formed by an modified SALICIDE method, and (b) a layer of a Ti-based material rendered amorphous are used. The TiSi2 layer is formed in a self-aligned manner by reacting the silicon substrate with the Ti layer by the interposition of e.g. a thin SiO2 layer and exhibits lower sheet resistance and dense film properties as well as excellent barriering properties. The Ti layer is stacked on the TiSi2 layer for improving wettability with respect to the layer of the Al-based material. The layer of the amorphous Ti-based material is formed by N2 ion implantation into the polycrystalline TiN layer and exhibits superior barrier properties because the crystal grain boundary functioning as the Al diffusion path is destructed. Both of these layers exhibit low sheet resistance as compared to the TiON layer used heretofore as a layer of a material exhibiting excellent barrier properties, while being superior in wettability with respect to the layer of the Al-based material, so that a highly reliable contact may be formed.

87 citations

Journal ArticleDOI
TL;DR: In this paper, a high-sensitivity CMOS image sensor using gain-adaptive column amplifiers is presented and tested, and the use of high gain for the column amplifier reduces input-referred random noise, and when coupled with a column-based digital noise cancellation technique, also reduces fixed pattern noise.
Abstract: A high-sensitivity CMOS image sensor using gain-adaptive column amplifiers is presented and tested. The use of high gain for the column amplifier reduces input-referred random noise, and when coupled with a column-based digital noise cancellation technique, also reduces fixed pattern noise. An experimental application of the circuit using 0.25-/spl mu/m CMOS technology with pinned photodiodes gave an rms random noise of 263 /spl mu/V and an rms fixed pattern noise of 50 /spl mu/V.

82 citations

Patent
01 Sep 2000
TL;DR: In this article, a camera module with a through-hole 14 for light transmission, an imaging element 11 flip chip mounted on one side of the substrate such that the light receiving portion 15 is exposed through the throughhole 14, and a shielding layer 22 on the back surface of the element on the opposite side of a light receiving component 15.
Abstract: Disclosed is a camera module in which an operational defect (generation of a ghost image) as a result of a reduction in thickness is eliminated. A camera module 2 includes a substrate 10 provided with a through-hole 14 for light transmission, a light receiving portion 15 provided on one side, an imaging element 11 flip chip mounted on one side of the substrate such that the light receiving portion 15 is exposed through the through-hole 14, and a shielding layer 22 on the back surface of the element on the opposite side of the light receiving portion 15, and a lens unit 12 mounted on the other side of the substrate 10.

60 citations

Patent
08 Feb 2000
TL;DR: In this article, a solid-state image-sensing device includes a first-conductivity-type second semiconductor well region formed between a firstconductivity first semiconductor region and the device isolation layer.
Abstract: A solid-state image-sensing device has pn-junction sensor parts isolated corresponding to pixels by a device isolation layer The solid-state image-sensing device includes a first-conductivity-type second semiconductor well region formed between a first-conductivity-type first semiconductor well region and the device isolation layer When the device is operating, a depletion layer of each sensor part spreads to the first semiconductor well region, which is beneath each of the sensor parts

52 citations

Journal ArticleDOI
TL;DR: In this paper, a floating diffusion (FD) driving pixel with a buried photodiode with three or less transistors, and lowvoltage driving technologies with a new photodiodes structure and FD-boost method are described.
Abstract: New CMOS image sensors that can realize high quality dark scene images with pixels smaller than conventional pixel types are described. The new technologies used to develop them are floating diffusion (FD) driving pixel with a buried photodiode with three or less transistors, and low-voltage driving technologies with a new photodiode structure and FD-boost method. Through the use of the 0.25-/spl mu/m technology, prototype chips consisting of 3.45-/spl mu/m size pixels were manufactured. Prototype chips consisting of 3.1-/spl mu/m size pixels which share FD between two neighboring pixels (2-pixel-sharing) were also manufactured. The complete transfer operation, that is to say, zero lag and zero pixel kTC noise was achieved at a supply voltage of 2.5 V with manufacturing stability. Realized saturation voltages were 510 and 360 mV for 3.45-/spl mu/m and 3.1-/spl mu/m size pixel chips, respectively. In addition, a combined double-correlated double sampling (CDS) architecture which can flexibly process two sets of signals in combination were employed. Due to its small pixel size, high image quality, and output flexibility, this framework has potential for replacing charge-coupled device (CCD) image sensors with CMOS image sensors in volume markets of digital still cameras and camcorders.

48 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Patent
22 Dec 2004
TL;DR: In this article, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer, a thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising silicon oxide film formed on the thin film.
Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer A thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO x N y Also, a thin film comprising SiO x N y is formed under the active layer The active layer includes a metal element at a concentration of 1×10 15 to 1×10 19 cm −3 and hydrogen at a concentration of 2×10 19 to 5×10 21 cm −3

719 citations

Journal ArticleDOI
TL;DR: In this paper, CMOS Image Sensors are reviewed, providing information on the latest advances achieved, their applications, the new challenges and their limitations, leading to the State-of-the-art of CMOS image sensors.

546 citations

Patent
12 Dec 2006
TL;DR: An endoscope assembly with a main imaging device and a first light source is configured to provide a forward view of a body cavity, and further includes a detachable imaging device with an attachment member engageable with the distal end region of the endoscope, a linking member connected to the attachment member, and an imaging element with a second light source as mentioned in this paper.
Abstract: An endoscope assembly with a main imaging device and a first light source is configured to provide a forward view of a body cavity, and further includes a detachable imaging device with an attachment member engageable with the distal end region of the endoscope, a linking member connected to the attachment member, and an imaging element with a second light source, wherein the detachable imaging device provides a retrograde view of the body cavity and the main imaging device. Light interference is reduced by using polarizing filters or by alternating the on/off state of the main imaging device, the first light source, the imaging element and the second light source so that the main imaging device and first light source are on when the imaging element and second light source are off and the main imaging device and first light source are off when the imaging element and second light source are on.

346 citations

Patent
10 Oct 2002
TL;DR: In this paper, a fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements, which includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.
Abstract: An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

240 citations