H
Hisakazu Edamatsu
Researcher at Panasonic
Publications - 4
Citations - 193
Hisakazu Edamatsu is an academic researcher from Panasonic. The author has contributed to research in topics: Inverter & Digital clock manager. The author has an hindex of 3, co-authored 4 publications receiving 191 citations.
Papers
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Proceedings ArticleDOI
Design of high speed MOS multiplier and divider using redundant binary representation
TL;DR: This work improved the algorithm and the method of implementation, and designed an advanced multiplier and divider for MOS LSI based on a new algorithm that has several excellent features such as high speed addition operations.
Patent
Method and apparatus for controlling a clock signal
TL;DR: In this article, the first and second blocks of a data processing device are selected and enabled in accordance with an instruction representing which of the first or second blocks should be selected, and a clock change signal is generated on the basis of the instruction.
Patent
Method of evaluating signal propagation delay in logic integrated circuit
TL;DR: In this article, the authors evaluate the signal propagation delay in an inverter chain having a first inverter cell and a second inverter cells connected by an intercell wire, and determine the logic threshold voltages for an increase and a decrease in the input pin voltage of the two inverters.
Proceedings ArticleDOI
Design methodologies for consumer-use video signal processing LSIs
TL;DR: This paper describes the methodologies used to design a Hi-Vision MUSE decoder for Japanese HDTV and codec LSIs for digital VCRs and the methodology used to verify the video signal processing algorithm and that of the physical design.