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Horst Zimmermann

Researcher at Vienna University of Technology

Publications -  499
Citations -  4784

Horst Zimmermann is an academic researcher from Vienna University of Technology. The author has contributed to research in topics: CMOS & Photodiode. The author has an hindex of 29, co-authored 486 publications receiving 4346 citations. Previous affiliations of Horst Zimmermann include University of Vienna & Daimler AG.

Papers
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Journal ArticleDOI

Zero-bias 40Gbit/s germanium waveguide photodetector on silicon.

TL;DR: A very high optical bandwidth, estimated up to 120GHz, was evidenced in 10 µm long Ge photodetectors selectively grown at the end of silicon waveguides using three kinds of experimental set-ups.
Journal ArticleDOI

A Comparator With Reduced Delay Time in 65-nm CMOS for Supply Voltages Down to 0.65 V

TL;DR: A comparator in a low-power 65-nm complementary metal-oxide-semiconductor process (only standard transistors with threshold voltage Vt ap 0.4 V were used) is presented, where the circuit of a conventional latch-type comparator consisting of two cross-coupled inverters is modified for fast operation, even with 0.65-V supply.
Book

Integrated Silicon Optoelectronics

TL;DR: In this paper, the authors present a theory of optical emission and absorption in silicon-on-insulator (SINR)-based integrated circuits, including the use of photodetectors.
Journal ArticleDOI

Gold and Platinum Diffusion: The Key to the Understanding of Intrinsic Point Defect Behavior in Silicon

TL;DR: In this paper, the diffusion of gold and platinum in float zone (FZ) silicon is found to be dominated by the kick-out mechanism for temperatures of 800° C and higher, whereas for temperatures below approximately 850° C the dissociative mechanism governs platinum diffusion.
Proceedings ArticleDOI

A 65nm CMOS comparator with modified latch to achieve 7GHz/1.3mW at 1.2V and 700MHz/47µW at 0.6V

TL;DR: Clocked regenerative comparators, which use positive feedback of a latch to force a fast decision, are used for many applications and are designed to extract every 4th bit of a 40Gb/s data stream.