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Showing papers by "Huai Wang published in 2021"


Journal ArticleDOI
TL;DR: The three distinctive life-cycle phases, design, control, and maintenance are correlated with one or more tasks to be addressed by AI, including optimization, classification, regression, and data structure exploration.
Abstract: This article gives an overview of the artificial intelligence (AI) applications for power electronic systems. The three distinctive life-cycle phases, design, control, and maintenance are correlated with one or more tasks to be addressed by AI, including optimization, classification, regression, and data structure exploration. The applications of four categories of AI are discussed, which are expert system, fuzzy logic, metaheuristic method, and machine learning. More than 500 publications have been reviewed to identify the common understandings, practical implementation challenges, and research opportunities in the application of AI for power electronics. This article is accompanied by an Excel file listing the relevant publications for statistical analytics.

287 citations


Journal ArticleDOI
TL;DR: A comprehensive review and comparison of CM schemes for different types of dc-link applications with emphasis on the application objectives, implementation methods, and monitoring accuracy when being used is provided.
Abstract: Capacitors are widely used in dc links of power electronic converters to balance power, suppress voltage ripple, and store short-term energy. Condition monitoring (CM) of dc-link capacitors has great significance in enhancing the reliability of power converter systems. Over the past few years, many efforts have been made to realize CM of dc-link capacitors. This article gives an overview and a comprehensive comparative evaluation of them with emphasis on the application objectives, implementation methods, and monitoring accuracy when being used. First, the design procedure for the CM of capacitors is introduced. Second, the main capacitor parameters estimation principles are summarized. According to these principles, various possible CM methods are derived in a step-by-step manner. On this basis, a comprehensive review and comparison of CM schemes for different types of dc-link applications are provided. Finally, application recommendations and future research trends are presented.

98 citations


Journal ArticleDOI
TL;DR: A health indicator estimation method based on the digital-twin concept aiming for condition monitoring of power electronic converters is proposed, which is noninvasive, without additional hardware circuits, and calibration requirements.
Abstract: This article proposes a health indicator estimation method based on the digital-twin concept aiming for condition monitoring of power electronic converters. The method is noninvasive, without additional hardware circuits, and calibration requirements. An application for a buck dc–dc converter is demonstrated with theoretical analyses, practical considerations, and experimental verifications. The digital replica of an experimental prototype is established, which includes the power stage, sampling circuit, and close-loop controller. Particle swarm optimization algorithm is applied to estimate the unknown circuit parameters of interest based on the incoming data from both the digital twin and the physical prototype. Cluster-data of the estimated health indicators under different testing conditions of the buck converter is analyzed and used for observing the degradation trends of key components, such as capacitor and MOSFET. The outcomes of this article serve as a key step for achieving noninvasive, cost-effective, and robust condition monitoring for power electronic converters.

95 citations


Journal ArticleDOI
Frede Blaabjerg1, Huai Wang1, Ionut Vernica1, Bochen Liu1, Pooya Davari1 
01 Jun 2021
TL;DR: This article introduces the reliability requirements and challenges given for the power electronics applied in EV/HEV applications, and the advances in power electronic components to address the reliability challenges are introduced as they individually contribute to the overall system reliability.
Abstract: The electrification of the transportation sector is moving on at a fast pace. All car manufacturers have strong programs to electrify their car fleet to fulfill the demands of society and customers by offering carbon-neutral technologies to bring goods and persons from one location to another. Power electronics technology is, in this evolution, essential and also in a rapid development technology-wise. Some of the introduced technologies are quite mature, and the systems designed must have high reliability as they can be quite complicated from an electrical perspective. Therefore, this article focuses on the reliability of the used power electronic systems applied in electric vehicles (EVs) and hybrid EVs (HEVs). It introduces the reliability requirements and challenges given for the power electronics applied in EV/HEV applications. Then, the advances in power electronic components to address the reliability challenges are introduced as they individually contribute to the overall system reliability. The reliability-oriented design methodology is also discussed, including two examples: an EV onboard charger and the drive train inverter. Finally, an outlook in terms of research opportunities in power electronics reliability related to EV/HEVs is provided. It can be concluded that many topics are already well handled in terms of reliability, but issues related to complete new technology introduction are important to keep the focus on.

44 citations


Journal ArticleDOI
TL;DR: A framework that can formulate a superior failure precursor for the given RUL prediction model is elaborated, and the proposed method is validated with the power cycling testing results of SiC MOSFETs.
Abstract: In order to prevent catastrophic failures in power electronic systems, multiple failure precursors have been identified to characterize the degradation of power devices. However, there are some practical challenges in determining the suitable failure precursor, which supports the high-accuracy prediction of remaining useful life (RUL). This article proposes a method to formulate a composite failure precursor (CFP) by taking full advantage of potential failure precursors (PFPs), where CFP is directly optimized in terms of the degradation model to improve the prediction performance. The RUL estimations of the degradation model are explicitly derived to facilitate the precursor quality calculation. For CFP formulation, a genetic programming method is applied to integrate the PFPs in a nonlinear way. As a result, a framework that can formulate a superior failure precursor for the given RUL prediction model is elaborated. The proposed method is validated with the power cycling testing results of SiC MOSFETs.

36 citations


Journal ArticleDOI
TL;DR: In this paper, the authors present exploratory efforts in the data-driven condition monitoring of power electronic systems (PES) in the view of existing challenges and emerging opportunities using Artificial Intelligence (AI).
Abstract: Condition monitoring is a proactive measure to realize operation optimization, predictive maintenance, and high availability of Power Electronic Systems (PES). It is demanded by reliability-, safety-, or availability-critical applications. The core of condition monitoring is a prediction based on historical and present information. Artificial Intelligence (AI) could play a role in addressing optimization, regression, and classification problems in predicting the operation or health status of PES. Besides AI algorithms, quality data collection, objective formulation, and result validation require an in-depth understanding of the PES. The nexus between PES and AI expects to create overarching effects in the condition monitoring area. This article presents exploratory efforts in the data-driven condition monitoring of PES in the view of existing challenges and emerging opportunities.

34 citations


Journal ArticleDOI
Zhengge Chen1, Bochen Liu1, Yongheng Yang1, Pooya Davari1, Huai Wang1 
TL;DR: This article introduces a consistent component database-based design procedure with electrical, thermal, and cost models for general topology simplification methods for dual-converter cell-based bridgeless topologies.
Abstract: Compared with conventional power factor correction topologies, although dual-converter cell-based bridgeless topologies usually have higher efficiency, most of them suffer from high component counts. Thus, this article proposes general topology simplification methods for these topologies. Besides, several selected converter cells are exemplified to show the specific topology simplification processes, and the performance of the resultant simplified topologies is reviewed. Meanwhile, based on the same design specifications, in order to provide an unbiased quantitative topology comparison in terms of power loss, cost, and volume, this article introduces a consistent component database-based design procedure with electrical, thermal, and cost models. As case studies, the conventional and two selected bridgeless buck–boost-type topologies are compared by following the design procedure. The comparison results are analyzed to provide a reference for topology selection. Three prototypes are built and tested to verify the theoretical analysis.

28 citations


Journal ArticleDOI
Mengxing Chen1, Huai Wang1, Donghua Pan1, Xiongfei Wang1, Frede Blaabjerg1 
TL;DR: In this article, a temperature-dependent Cauer-type thermal model of the SiC MOSFET is proposed and extracted based on offline finite-element simulations, and the experimental measurement of transient thermal impedance was conducted under operating temperature variations (with virtual junction temperature ranging from 60.5 °C to 199.6 °C).
Abstract: This article characterizes the thermal behavior of a commercialized silicon carbide (SiC) power MOSFET module with special concerns on high-temperature operating conditions as well as particular focuses on SiC MOSFET dies. A temperature-dependent Cauer-type thermal model of the SiC MOSFET is proposed and extracted based on offline finite-element simulations. This Cauer model is able to reveal the temperature-dependent thermal property of each packaging layer, and it is suitable for the high-temperature thermal-profile prediction with sufficient computational efficiency. Due to the temperature-dependent thermal properties of the SiC die and ceramic material, the junction-heatsink thermal resistance can be increased by more than 10% under high-temperature conditions (up to 200 °C), which can considerably worsen thermal estimations of the SiC die and its packaging materials. Furthermore, the experimental measurement of transient thermal impedance was conducted under operating temperature variations (with virtual junction temperature ranging from 60.5 °C to 199.6 °C), and the effectiveness of the proposed temperature-dependent Cauer model was fully validated.

17 citations


Journal ArticleDOI
TL;DR: A simplified equivalent circuit model and its analytical model to obtain the dc-link continuous current in multiple drives is proposed, which releases the designers from configuring the large simulation for multiple drives, and the capacitor sizing from reliability aspect for multiple slim drives is given.
Abstract: Lifetime prediction of dc-link capacitors in a single drive has been discussed before, which indicates that the capacitor in a standard drive meets serious reliability challenges and in a slim drive does not However, in most of the applications, drives are connected in parallel with the power grid The large amount of harmonic distortion produced by nonlinearity drives may transmit and couple between grid and drives, which changes the stresses of devices as well as the dc-link filters Therefore, the estimated results in a single drive cannot be extended to multiple drives any more This article investigates the lifetime of dc-link capacitors in multiple drives system First, by decoupling the interactions among grid-connected drives, a simplified equivalent circuit model and its analytical model to obtain the dc-link continuous current in multiple drives is proposed, which releases the designers from configuring the large simulation for multiple drives Then, applying the lifetime prediction method, the lifetime of dc-link capacitors in multiple drives is investigated, in terms of types of drives, numbers of drives, and grid conditions The results show that the lifetime of the standard drives extends in the multidrive systems and the lifetime of the slim drives decreases in the multidrive systems, which break the previous mind Finally, based on the proposed analytical model and lifetime estimation method, the capacitor sizing from reliability aspect for multiple slim drives is given The outcomes of the lifetime investigation could be a guideline for the design of the capacitive dc link in multidrive systems

17 citations


Journal ArticleDOI
TL;DR: In this paper, a health state estimation and remaining useful life prediction method for power devices in the presence of noisy and aperiodic degradation measurements is proposed, where three sources uncertainties in the degradation modeling, including the temporal uncertainty, measurement uncertainty, and device-to-device heterogeneity, are formulated in a Gamma state-space model to ensure health assessment accuracy.
Abstract: Condition monitoring of power devices is highly critical for safety and mission-critical power electronics systems. Typically, these systems are subjected to noise in harsh operational environment contaminating the degradation measurements. In dynamic applications, the system duty cycle may not be periodic and results in aperiodic degradation measurements. Both these factors negatively affect the health assessment performance. In order to address these challenges, this article proposes a health state estimation and remaining useful life prediction method for power devices in the presence of noisy and aperiodic degradation measurements. For this purpose, three-source uncertainties in the degradation modeling, including the temporal uncertainty, measurement uncertainty, and device-to-device heterogeneity, are formulated in a Gamma state-space model to ensure health assessment accuracy. In order to learn the device degradation behavior, a model parameter estimation method is developed based on a stochastic expectation-maximization algorithm. The accuracy and robustness of the proposed method are verified by numerical analysis under various noise levels. Finally, the findings are justified using SiC metal–oxide-semiconductor field-effect transistors (MOSFETs) accelerated aging test data.

16 citations


Journal ArticleDOI
TL;DR: This letter proposes a converter-level method for measuring the on-state voltages of all power semiconductors in a single-phase inverter by using a single circuit only, which has the advantages of reduced circuit complexity, size, cost, and ease of connection.
Abstract: This letter proposes a converter-level method for measuring the on -state voltages of all power semiconductors in a single-phase inverter by using a single circuit only. The proposed circuit distinguishes itself by connecting to the middle point of each phase leg, instead of the two power terminals of individual devices as conventional methods do. It has the advantages of reduced circuit complexity, size, cost, and ease of connection. The principle and theoretical analysis of the proposed converter-level method are discussed. A case study on a single-phase full-bridge inverter is demonstrated to prove the concept.

Proceedings ArticleDOI
10 Oct 2021
TL;DR: In this paper, the authors propose to explain the black-box feature of data-driven machine learning (ML) models used for controlling power electronic converters for the first time, by calculating a conditional entropy for each input with respect to an output.
Abstract: This paper proposes to explain the black-box feature of data-driven machine learning (ML) models used for controlling power electronic converters for the first time. As the name suggests, their “black box” feature prevents a clear understanding of the physical insights behind these ML models. It remains a fundamental aspect, if one plans to take action based on a prediction, or deploy a new ML model. Moreover, leaked and corrupted data during the training process can easily augment unexplainable actions from them. To address these issues, we first interpret the actions of the black box models by calculating a conditional entropy for each input with respect to an output. Using this metric, the averaged relationships between each input-output can be mapped and representative conclusions are firstly drawn on identifying erroneous data. Finally, these abnormal data are then removed from the training database to improve the interpretability & classification abilities of the ML model. We illustrate our findings on the performance of a regression based learning tool used for controlling a grid-connected voltage source inverter (VSI).

Journal ArticleDOI
TL;DR: In this paper, a safe operating area (SOA) concept for film capacitors in dc-link applications is presented by capacitor voltage and ripple current, considering the impact of ambient temperature, degradation, and parameter variance.
Abstract: This letter proposes a safe operating area (SOA) concept for film capacitors in dc-link applications. The SOA is presented by capacitor voltage and ripple current, considering the impact of ambient temperature, degradation, and parameter variance. The theoretical derivations and proof-of-concept experimental verifications are given.

Journal ArticleDOI
TL;DR: In this paper, a di/dt -RCD (RC + diode) was proposed to offer more accurate and consistent results, irrespective of the fault types, and the design equations for the circuit have been derived for implementing an experimental setup.
Abstract: Silicon carbide metal-oxide-semiconductor field-effect transistor has a smaller short-circuit tolerance, and hence, requires faster and more accurate short-circuit protection. One prospective method is to combine fast di/dt detection with an integration circuit. The former is for detecting the extremely fast increase of short-circuit current, while the latter is for generating a scaled copy of the short-circuit current for comparison with a threshold. The integration is almost always performed with a resistive–capacitive (RC) low-pass filter due to its simplicity. However, it does not produce consistent results under different load and fault conditions, which can, in turn, cause the detection to fail. An alternative di/dt -RCD (RC + diode) protective circuit has therefore been proposed to offer more accurate and consistent results, irrespective of the fault types. Design equations for the circuit have been derived for implementing an experimental setup, from which results have proven the effectiveness of the proposed di/dt -RCD protection.

Journal ArticleDOI
TL;DR: In this paper, a simplified converter-level on-state voltage measurement circuit for power semiconductor devices, without an external power supply and self-power circuit, is proposed, which retains the plug-and-play feature, comparable measurement accuracy, and dynamic response.
Abstract: This letter proposes a simplified converter-level on-state voltage measurement circuit for power semiconductor devices, without an external power supply and self-power circuit. It has a reduced component count and circuit complexity, and retains the plug-and-play feature, comparable measurement accuracy, and dynamic response as recently reported methods. A proof-of-concept prototype is developed and tested for a three-phase inverter application.

Journal ArticleDOI
TL;DR: To exclude the external power supply required in on-state voltage measurement circuits, a self-power solution is proposed to provide the required bidirectional low-voltage power sources.
Abstract: This article discloses part of an invention on plug-and-play converter-level on -state voltage measurement methods for power semiconductor devices. To exclude the external power supply required in on -state voltage measurement circuits, a self-power solution is proposed to provide the required bidirectional low-voltage power sources. The application of the measurement circuit with the proposed self-power solution is demonstrated for a single-switch, a single-phase inverter, and a three-phase inverter.

Journal ArticleDOI
TL;DR: A control strategy capable of operating DGs in both SA and GC environments, and the harmonics due to various conditions of transition and load switching are eliminated by adapting a harmonic elimination pulsewidth modulation (PWM) scheme.
Abstract: Improvement in the efficiency of distribution generation (DG) inverters is a concern and challenge for researchers across the globe. To address the concern an inverter control technique is developed. Inverters have issues with voltage regulation and harmonics when operating in the grid-connected (GC) and stand-alone (SA) mode. This paper proposes a control strategy capable of operating DGs in both SA and GC environments. The GC operation of the inverter is achieved by the current control mode and the SA control features a voltage control loop capable of overcoming the drawbacks due to load shedding or load switching. Besides, the harmonics due to various conditions of transition and load switching are eliminated by adapting a harmonic elimination pulse width modulation (PWM) scheme. To enhance the performance of the inverter and eliminate the problem of flexibility associated with conventional and offline switching angle calculations in the PWM technique, a Bio-Inspired Intelligent algorithm is adapted. The developed system is verified for various reduced total harmonic distortions (THD) by performing simulations and experiments. The results depict that the output voltage is regulated for varying load conditions, and the THD is observed to be 2.4% under varying load conditions.

Journal ArticleDOI
TL;DR: In this paper, a new reliability testing concept for the dc-link capacitor in PV inverters is proposed in contrast to the conventional method, the proposed reliability testing method designs the test profile through the modification of the original mission profile (e.g., solar irradiance and ambient temperature) in order to maintain the test condition as close to the real application as possible.
Abstract: The dc-link capacitor is considered as a weak component in photovoltaic (PV) inverter systems and its reliability needs to be evaluated and tested during the product development. Conventional reliability testing methods for capacitors are typically carried out under constant loading conditions, which do not reflect the real operating conditions (e.g., mission profile) of the dc-link capacitor in PV inverters. To address this issue, a new reliability testing concept for the dc-link capacitor in PV inverters is proposed in this article. In contrast to the conventional method, the proposed reliability testing method designs the test profile through the modification of the original mission profile (e.g., solar irradiance and ambient temperature) in order to maintain the test condition as close to the real application as possible. A certain acceleration factor is applied during the mission profile modification based on the lifetime model of the capacitor, in order to increase the thermal stress of the dc-link capacitor during test, and thereby effectively reduce the testing time.

Journal ArticleDOI
TL;DR: In this article, a measurement-based lump thermal model and a physical-model-based analytical thermal model are proposed for the thermal matching of capacitors in a bank by optimizing the parameters of individual capacitors, such as the rated parameters and actual loading.
Abstract: The inevitable electrothermal coupling among capacitors in a bank will lead to nonnegligible errors to the temperature as well as the lifetime prediction of the individual capacitor. In this article, the analytical thermal models with the corresponding design for capacitor banks are proposed considering the thermal coupling effect. First, a measurement-based lump thermal model and a physical-model-based analytical thermal model are proposed. Then, with the help of the proposed thermal models, the design method for the thermal matching of capacitors in a bank is proposed by optimizing the parameters of individual capacitors, such as the rated parameters and actual loading. To validate the accuracy of the proposed design, case studies based on a capacitor bank with nine capacitors are presented.

Journal ArticleDOI
01 Jul 2021-Energies
TL;DR: An intelligent seamless transition controller for smooth transition between grid-connected and standalone modes of distributed generation (DG) units in the grid provides advantage with less detection and disconnection time, and during synchronization, it instantly minimizes the phase-angle deviation to achieve efficient control.
Abstract: This paper proposes an intelligent seamless transition controller for smooth transition between grid-connected (GC) and standalone modes of distributed generation (DG) units in the grid. The development of this seamless controller contributes to two main processes in the transition modes: the synchronization process and an islanding process. For the synchronization process, the stationary reference frame phase-locked loop (SRF-PLL) associated with the voltage source inverter (VSI) is modified using the frequency, voltage deviation, and phase angle information. Furthermore, the islanding process is classified as intentional and unintentional islanding scenarios for achieving efficient transition control. Here, the intentional islanding process is achieved with the information that is available in the system due to the planned disconnection. For the unintentional islanding process, a fuzzy inference system (FIS) is used to modify the conventional droop control using the information of change in active power, voltage, and frequency. To identify the action of the proposed approach during the transition process, numerical simulations are conducted with the hardware-in-loop (HIL) simulator by developing a 10kWp three-phase grid-connected DG system. The results identified the efficient control of the VSI for both islanding and grid connection processes. In the islanding conditions, the proposed controller provides advantage with less detection and disconnection time, and during synchronization, it instantly minimizes the phase-angle deviation to achieve efficient control.

Journal ArticleDOI
Zhan Shen1, Huai Wang1
TL;DR: In this article, three modified formulas for parasitics of orthocyclic windings are proposed, and the impacts of the windings on windings is comprehensively studied.
Abstract: Orthocyclic winding in magnetic components is common in both laboratory prototyping and mass production, especially for round wires with curved edges. However, its impact on winding parasitics, i.e., winding capacitance, ac resistance, and leakage inductance, has not been systematically investigated yet. Omission or inaccurate calculation of these parameters leads to current ringing, additional losses, and even abnormal operations. In this article, three modified formulas for parasitics of orthocyclic windings are proposed, and the impacts of orthocyclic windings are comprehensively studied. Magnetic field distortion and air-gap effect are analyzed and compensated. The formulas are verified by finite-element method (FEM) simulation and experimental results. Finally, normal and orthocyclic windings are compared, and conclusions are listed to illustrate the impact of orthocyclic windings on parasitics.

Journal ArticleDOI
Mengxing Chen1, Donghua Pan1, Huai Wang1, Xiongfei Wang1, Frede Blaabjerg1 
TL;DR: In this article, the authors investigated the switching oscillations of three-level active neutral-point-clamped (3L-ANPC) inverters under three typical commutation modes (i.e., the full mode, outer mode, and inner mode).
Abstract: This article investigates the multifrequency switching oscillations of silicon carbide (SiC) MOSFETs in three-level active neutral-point-clamped (3L-ANPC) inverters under three typical commutation modes (i.e., the full mode, outer mode, and inner mode). Multiple switching-oscillation components with various frequencies are identified theoretically for both the full- and outer-mode commutations, due to their switching-loop diversities. Oppositely, the inner mode exhibits a single oscillation component as only one switching loop is involved. Three types of double-pulse tests (DPTs) are conducted on a 3L-ANPC inverter demonstrator with SiC MOSFETs, and the switching-oscillation components are extracted accordingly, which match well with the theoretical derivations. Moreover, other switching characteristics closely related, i.e., the oscillation peaks, current overshoots, capacitive charges, and switching energies, are studied and benchmarked according to the DPT results. It is concluded that the full- and outer-mode commutations share similarities in terms of switching oscillations, current overshoots, capacitive charges, and turn-on energies. The theoretical findings from this work provide a comprehensive knowledge of the multifrequency oscillation mechanisms associated with fast-switched 3L-ANPC inverters. Accordingly, the critical parasitic components are identified, and specific design considerations are proposed to achieve switching-performance improvements.

Journal ArticleDOI
TL;DR: In this paper, the authors proposed a fast and robust open-circuit fault diagnosis method without additional sensors for cascaded H-bridge multilevel converters (CHBMCs).
Abstract: This paper proposes a fast and robust open-circuit fault diagnosis method without additional sensors for cascaded H-bridge multilevel converters (CHBMCs). The method is based on the error between the actual input-side voltage and the estimated one, with one detection threshold and 2n comparators in n cascaded H-bridges. Benefit from the simple design of the fault location, spike elimination, and parameter estimation, with the lower implementation burden, the single and multiple faults in arbitrary positions are accurately identified within a fundamental cycle, and the diagnostic robustness is guaranteed under different transient changes. In view of the low complexity, the proposed scheme can be easily applied to the CHBMCs with arbitrary modules. The experimental results from a CHBMC prototype verify the effectiveness of the proposed method under different operating conditions and fault scenarios.

Journal ArticleDOI
TL;DR: A novel phase-shift method is developed to get a minimized attenuation required by a filter in Band B, and a volume optimization of the required DM filter was introduced based on the calculated filter attenuation and volumetric component parameters.
Abstract: Interleaved power factor correction (PFC) is widely used circuit topology due to good efficiency and power density for single-switch boost PFC. As the differential mode (DM) electromagnetic interference (EMI) noise magnitude depends upon the input current ripple, this research details a comprehensive study of DM EMI filter design for interleaved boost PFC with the aim of minimizing the component size. It is also demonstrated that the different numbers of interleaved stages and switching frequency influence the filter attenuation requirement and, thus, the EMI filter size. First, an analytical model is derived on the basis of the Norton equivalent circuit model for the differential mode noises of interleaved boost PFC within the frequency range of 9–500 kHz. The derived model can help identify the proper phase shifting among the interleaved boost converters in order to minimize the considered differential mode noises at the filter design frequency. So, a novel phase-shift method is developed to get a minimized attenuation required by a filter in Band B. Further, a volume optimization of the required DM filter was introduced based on the calculated filter attenuation and volumetric component parameters. Based on the obtained results, unconventional and conventional phase shifts have demonstrated a good performance in decreasing the EMI filter volume in Band B and Band A, respectively. A 2-kW interleaved PFC case study is presented to verify the theoretical analyses and the impact of phase-shifting on EMI filter size.

Proceedings ArticleDOI
10 Oct 2021
TL;DR: In this article, a comparative study on three converter-level measurement circuits is given in terms of hardware design, operational performance, and practical implementation, which guides the selection and design of suitable measurement circuit for different applications.
Abstract: The on-state voltage is a key characteristic parameter and relative to the health condition and junction temperature of power semiconductor devices. Hence, it is widely used to evaluate the reliability and realize the predictive maintenance of power devices. Recently, three converter-level measurement circuits are proposed, capable of extracting the on-state voltage of all power devices in a power converter with one circuit only. In this paper, a comparative study on these three converter-level circuits is given in terms of hardware design, operational performance, and practical implementation, which guides the selection and design of suitable measurement circuit for different applications. The comparisons are illustrated with theoretical analyses and experimental results.

Proceedings ArticleDOI
10 Oct 2021
TL;DR: In this article, the authors studied the reliability-oriented design of the active inductor for a 7.5 kW commercial motor drive product, and benchmarks the performance of active inductors and passive inductors in terms of volume, weight, and cost.
Abstract: Volume, weight, and cost are considered as the drawbacks of the passive LC filters. Recently, activation of passive inductor concept has been proposed to break these limits, which emulates the impedance of passive inductor by using power semiconductor circuits. To explore the benefits of this new concept in motor drive applications, this paper studies the reliability-oriented design of the active inductor for a 7.5 kW commercial motor drive product, and benchmarks the performance of active inductors and passive inductors in terms of volume, weight, and cost. Prototypes are manufactured to verify the accuracy of the modeling results, which proves that the volume, weight, and cost of an active inductor for a 7.5 kW motor drive are 90.5%, 66.7% and 91.2% of the passive inductor, respectively.

Proceedings ArticleDOI
14 Jun 2021
TL;DR: In this article, the authors explore a method to reduce the reliability testing time by exploiting capacitor's early-degradation information, which makes more use of early degradation information in reliability testing.
Abstract: Long-term reliability testing time of power electronic components (e.g., film capacitors) entails delayed feedback of their performance, often many months to years, which has been one of critical limitations for accelerating power electronic technology development. In this paper, we explore a method to reduce the reliability testing time by exploiting capacitor’s early-degradation information. In contrast to the conventional testing methods based on end-of-life (EOL) data alone, the proposed method makes more use of early degradation information in the reliability testing. The proposed method can predict the EOL lifetime of the film capacitor with 2.5% degradation testing only. The maximum error of the predicted result is less than 5% error compared to the conventional test-to-fail method. The proposed work serves as a first step to reduce the reliability testing time and accelerate the technology development of power electronics.

Proceedings ArticleDOI
Zhan Shen1, Mengxing Chen1, Huai Wang1, Xiongfei Wang1, Frede Blaabjerg1 
14 Jun 2021
TL;DR: In this article, a robustness assessment of an EMI filter for a SiC-based three-level active neutral-point-clamped inverter taking into account component degradations is presented.
Abstract: The increasing demand for high-power-density power electronics converters requires they operate in higher and higher switching frequency. The silicon carbide (SiC) device is becoming more and more popular due to its superior characteristics compared with the silicon device. However, its fast switching capability also induces severe electromagnetic interference (EMI) issues. An EMI filter with a suitable design margin is essential to conform to the EMI standards and enable a safe operating environment for other electronic devices. Excessive design margin can increase the converter’s size and cost, while an insufficient margin can affect the long-term robustness of the EMI filter and may result in a system-level failure. This paper presents a robustness assessment of an EMI filter for a SiC-based three-level active neutral-point-clamped inverter taking into account component degradations. The mission profile, including multiple degradation-critical stressors, is adopted to analyze the real field application’s operating scenario. The parameter shifting of film capacitors and nanocrystalline core chokes during the aging is obtained, considering the parameter variation of the models and devices. Finally, experimental results and robustness analysis of the studied filter are presented and used as feedback to determine a suitable filter design margin for doing a robust design.

Journal ArticleDOI
TL;DR: The methodology proposed in the paper integrates the device-level analysis into the domain of the conventional power system reliability analysis while outlining the steps needed to deal with non-exponential distributed failures of power electronic-based generation units.
Abstract: The reliability of power converters has been extensively examined in terms of component- and converter level. However, in case of multiple generation units, the evaluation of the performance of power systems requires system-level modeling. This paper aims to merge the prior art of reliability modeling of power converters with the adequacy evaluation of power systems through an extensive design and evaluation analysis of a microgrid based case study. The methodology proposed in the paper integrates the device-level analysis into the domain of the conventional power system reliability analysis while outlining the steps needed to deal with non-exponential distributed failures of power electronic-based generation units. A replacement policy of the power electronic-based units is adopted by means of evaluating the system risk of not supplying system loads, and, finally, an approach on how to ensure a desired replacement frequency is outlined.

Posted ContentDOI
17 Feb 2021
TL;DR: A novel phase-shift method is developed to get a minimized attenuation required by a filter in Band B, and a volume optimization of the required DM filter was introduced based on the calculated filter attenuation and volumetric component parameters.
Abstract: Interleaved power factor correction (PFC) is widely used circuit topology due to good efficiency and power density for single-switch boost PFC. As the differential mode (DM) electromagnetic interference (EMI) noise magnitude depends upon the input current ripple, this research details a comprehensive study of DM EMI filter design for interleaved boost PFC with the aim of minimizing the component size. It is also demonstrated that the different numbers of interleaved stages and switching frequency influence the filter attenuation requirement and, thus, the EMI filter size. First, an analytical model is derived on the basis of the Norton equivalent circuit model for the differential mode noises of interleaved boost PFC within the frequency range of 9-500 kHz. The derived model can help identify the optimal phase shifting among the interleaved boost converters in order to minimize the considered differential mode noises at the filter design frequency. So, a novel phase-shift method is developed to get a minimized attenuation required by a filter in Band B. Further, a volume optimization of the required DM filter was introduced based on the calculated filter attenuation and volumetric component parameters. Based on the obtained results, unconventional and conventional phase shifts have demonstrated a good performance in decreasing the EMI filter volume in Band B and Band A, respectively. A 2-kW interleaved PFC case study is presented to verify the theoretical analyses and the impact of phase-shifting on EMI filter size.