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Ieee Circuits

Bio: Ieee Circuits is an academic researcher. The author has contributed to research in topics: Very-large-scale integration. The author has an hindex of 1, co-authored 1 publications receiving 223 citations.

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Journal ArticleDOI
TL;DR: A new method based on the exploitation of the dynamical features of stochastic nonlinear oscillators is shown to outperform standard linear oscillators and to overcome some of the most severe limitations of present approaches.
Abstract: Ambient energy harvesting has been in recent years the recurring object of a number of research efforts aimed at providing an autonomous solution to the powering of small-scale electronic mobile devices. Among the different solutions, vibration energy harvesting has played a major role due to the almost universal presence of mechanical vibrations. Here we propose a new method based on the exploitation of the dynamical features of stochastic nonlinear oscillators. Such a method is shown to outperform standard linear oscillators and to overcome some of the most severe limitations of present approaches. We demonstrate the superior performances of this method by applying it to piezoelectric energy harvesting from ambient vibration.

1,055 citations

Journal ArticleDOI
TL;DR: The IMPLY logic gate, a memristor-based logic circuit, is described and a methodology for designing this logic family is proposed, based on a general design flow suitable for all deterministic memristive logic families.
Abstract: Memristors are novel devices, useful as memory at all hierarchies. These devices can also behave as logic circuits. In this paper, the IMPLY logic gate, a memristor-based logic circuit, is described. In this memristive logic family, each memristor is used as an input, output, computational logic element, and latch in different stages of the computing process. The logical state is determined by the resistance of the memristor. This logic family can be integrated within a memristor-based crossbar, commonly used for memory. In this paper, a methodology for designing this logic family is proposed. The design methodology is based on a general design flow, suitable for all deterministic memristive logic families, and includes some additional design constraints to support the IMPLY logic family. An IMPLY 8-bit full adder based on this design methodology is presented as a case study.

526 citations

Proceedings ArticleDOI
07 Feb 2000
TL;DR: Non-alterable identification is required for tracking work in progress, detecting part rebranding, radio frequency identification (RFID), IP protection, and transaction validation.
Abstract: Non-alterable identification is required for tracking work in progress, detecting part rebranding, radio frequency identification (RFID), IP protection, and transaction validation. Wafer-level techniques such as laser link cutting, and circuit-level EPROM techniques, require expensive machinery or special wafer processing. Integrated circuit identification (ICID) extracts unique and repeatable information from the randomness inherent in silicon processing. No external programming or special process steps are needed, and the technique may be used with any standard submicron CMOS process.

351 citations

Journal ArticleDOI
TL;DR: This paper constitutes the first successful experience of applying formal methods and satisfiability to quantum logic synthesis, thus synthesizing in principle arbitrary multi-output Boolean functions with quantum gate library.
Abstract: This paper proposes an approach to optimally synthesize quantum circuits by symbolic reachability analysis, where the primary inputs and outputs are basis binary and the internal signals can be nonbinary in a multiple-valued domain. The authors present an optimal synthesis method to minimize quantum cost and some speedup methods with nonoptimal quantum cost. The methods here are applicable to small reversible functions. Unlike previous works that use permutative reversible gates, a lower level library that includes nonpermutative quantum gates is used here. The proposed approach obtains the minimum cost quantum circuits for Miller gate, half adder, and full adder, which are better than previous results. This cost is minimum for any circuit using the set of quantum gates in this paper, where the control qubit of 2-qubit gates is always basis binary. In addition, the minimum quantum cost in the same manner for Fredkin, Peres, and Toffoli gates is proven. The method can also find the best conversion from an irreversible function to a reversible circuit as a byproduct of the generality of its formulation, thus synthesizing in principle arbitrary multi-output Boolean functions with quantum gate library. This paper constitutes the first successful experience of applying formal methods and satisfiability to quantum logic synthesis

254 citations

Proceedings ArticleDOI
19 Mar 2007
TL;DR: Hardware-based approaches to RFID security that rely on physically unclonable functions (PUFs) that exploit the inherent variability of wire delays and parasitic gate delays in manufactured circuits, and may be implemented with an order-of-magnitude reduction in gate count as compared with traditional cryptographic functions are proposed.
Abstract: Radio frequency identification (RFID) is an increasingly popular technology that uses radio signals for object identification. Tracking and authentication in RFID tags have raised many privacy and security concerns. On the other hand, known privacy and security cryptographic defenses are too hardware-expensive to incorporate into low-cost RFID tags. In this paper, we propose hardware-based approaches to RFID security that rely on physically unclonable functions (PUFs). These functions exploit the inherent variability of wire delays and parasitic gate delays in manufactured circuits, and may be implemented with an order-of-magnitude reduction in gate count as compared with traditional cryptographic functions. We describe protocols for privacy-preserving tag identification and secure message authentication codes. We compare PUFs to digital cryptographic functions, address other uses of PUFs to enhance RFID security and suggest interesting directions for future research. The proposed solutions are efficient, practical, and appropriate for low-cost RFID systems

224 citations