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Inas A. Awad

Bio: Inas A. Awad is an academic researcher from Cairo University. The author has contributed to research in topics: Current conveyor & CMOS. The author has an hindex of 8, co-authored 14 publications receiving 439 citations.

Papers
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Journal ArticleDOI
TL;DR: In this paper, two new types of second generation current conveyor (CCII) are introduced and the properties of the nullor and mirror elements are used to relate the different devices in the ideal case as well as to define the adjoint network for each building block.
Abstract: The concept of voltage mirror is introduced and used, together with the current mirror, to ideally represent the current and voltage inverting properties of some analogue building blocks. The properties of the nullor and mirror elements are used to relate the different devices in the ideal case as well as to define the adjoint network for each building block. Two new types of second generation current conveyor (CCII) are introduced. One is the adjoint of the CCII+ and is named the inverting second generation current conveyor ‘negative’ (ICCII–); the other is the ICCII+. CMOS realizations of the ICCII– are presented and new ICCII– based current mode circuits are obtained by applying a voltage-to-current-mode transformation to the CCII+ based circuits.

219 citations

Journal ArticleDOI
TL;DR: The voltage mirror and the current mirror are two pathological elements used to represent active devices featuring voltage or current reversing properties as discussed by the authors, and it is demonstrated that they form a complete set analogous to that formed by the nullator and the norator.
Abstract: The voltage mirror and the current mirror are two pathological elements used to represent active devices featuring voltage or current reversing properties. The properties of these ideal elements are presented and it is demonstrated that they form a complete set analogous to that formed by the nullator and the norator.

77 citations

Journal ArticleDOI
TL;DR: In this paper, a second-generation current conveyor negative (CCII-) realization suitable for very large scale implementation is described, which provides a very low impedance level at the N terminal and a wide dynamic voltage range, as well as high current tracking accuracy.
Abstract: New second-generation current conveyor negative (CCII-) realization suitable for very large scale implementation is described. The proposed architecture provides a very low impedance level at the N terminal and a wide dynamic voltage range, as well as a high current tracking accuracy. Simulations show that the CCII- current follower bandwidth extends beyond 100 MHz. Two compensation methods are discussed: the first results in voltage-offset cancellation, while the second results in voltage-offset compensation as well as Rx reduction.

50 citations

Journal ArticleDOI
TL;DR: In this paper, a new CMOS CCII+ is proposed, which is characterized by high precision in voltage tracking and exhibits very low input resistance, and an adaptive voltage offset cancellation methodology is introduced.
Abstract: In this paper, a new CMOS CCII + is proposed. The circuit is characterized by high precision in voltage tracking and exhibits very low input resistance. An adaptive voltage offset cancellation methodology is introduced and then applied to the proposed circuit. As a result, a higher accuracy CCII + is presented. For both circuits, the voltage offset cancellation is independent of the input current and voltage. To demonstrate the strength of the proposed architectures, fair comparisons with Liu and Yodprasit CCII realizations are held.

26 citations

Journal ArticleDOI
01 Jan 2000-Frequenz
TL;DR: In this paper, the authors describe a systematic approach to obtain alternative realizations for a particular active building block based on its simple ideal representation, which results in alternative representations which give the designer a choice of circuits that may be used to build the active device with the possibility of enhancing its characteristics.
Abstract: This paper describes a systematic approach to obtain alternative realizations for a particular active building block based on its simple ideal representation. The proposed approach relies on the properties of two categories of ideal elements; the well-known nullor elements and the mirror elements, which are basically used to model the active devices featuring voltage or current inverting properties. These ideal elements are used to obtain ideally equivalent nullor-mirror representations for a particular active device. The described approach results in alternative representations which give the designer a choice of circuits that may be used to build the active device with the possibility of enhancing its characteristics. As an example, the proposed approach is used to generate alternative realizations for the negative type of the second-generation current conveyor (CCII-). Most of the CCIIrealizations result in high performance in terms of impedance level, accuracy and frequency response. PSpice simulations that demonstrate the performance of the different realizations are also given.

26 citations


Cited by
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Journal Article
TL;DR: An analysis of the state-of-the-art of active elements for analog signal processing is presented which support - in contrast to the conven tional operational amplifiers - not only the voltage-mode but also the current- and mixed-mode operations.
Abstract: In the paper, an analysis of the state-of-the-art of active elements for analog signal processing is presented which support - in contrast to the conven tional operational amplifiers - not only the voltage-mode but also the current- and mixed-mode operations. Several pro blems are addressed which are associated with the utiliza tion of these elements in linear applications, particularly in frequency filters. A methodology is proposed which generates a number of fundamentally new active elem ents with their potential utilization in various areas o f signal processing.

650 citations

Journal ArticleDOI
TL;DR: The improved formulation method is compared with traditional formulation methods, showing that the NA matrix is more compact and the generation of nonzero coefficients is reduced, since the CPU time and memory consumption is reduced when recursive determinant-expansion techniques are used to solve theNA matrix.
Abstract: This paper proposes new pathological element-based active device models which can be used in analysis tasks of linear(ized) analog circuits. Nullators and norators along with the voltage mirror-current mirror (VM-CM) pair (collectively known as pathological elements) are used to model the behavior of active devices in voltage-, current-, and mixed-mode, also considering parasitic elements. Since analog circuits are transformed to nullor-based equivalent circuits or VM-CM pairs or as a combination of both, standard nodal analysis can be used to formulate the admittance matrix. We present a formulation method in order to build the nodal admittance (NA) matrix of nullor-equivalent circuits, where the order of the matrix is given by the number of nodes minus the number of nullors. Since pathological elements are used to model the behavior of active devices, we introduce a more efficient formulation method in order to compute small-signal characteristics of pathological element-based equivalent circuits, where the order of the NA matrix is given by the number of nodes minus the number of pathological elements. Examples are discussed in order to illustrate the potential of the proposed pathological element-based active device models and the new formulation method in performing symbolic analysis of analog circuits. The improved formulation method is compared with traditional formulation methods, showing that the NA matrix is more compact and the generation of nonzero coefficients is reduced. As a consequence, the proposed formulation method is the most efficient one reported so far, since the CPU time and memory consumption is reduced when recursive determinant-expansion techniques are used to solve the NA matrix.

111 citations

Journal ArticleDOI
TL;DR: In this paper, a dual-X current conveyor is proposed for linear tunable continuous-time filtering, which can achieve high linearity with the aid of triode MOSFETs.
Abstract: In this work, a new active device, namely the dual-X current conveyor is proposed for linear tunable continuous-time filtering. The proposed device avails tunability with the aid of triode MOSFETs, while keeping large-signal linearity high. Besides linearity enhancement, the dual-X structure of the active device brings interesting features, which help reduce the required number of active devices and MOSFET resistors in a MOSFET-C continuous-time filter. Also, unlike most MOSFET-C filter structures, there does not exist a matching requirement for the utilized MOSFETs. A CMOS implementation and two application examples (a current mode Tow-Thomas biquad and a current-mode sinusoidal oscillator) are supplied and simulated to reveal the important advantages.

109 citations

Journal ArticleDOI
TL;DR: Design and simulation of a digitally controlled CMOS fully differential current conveyor using a novel current division network (CDN) to provide the digital control of the current gain between terminals X and Z is presented.
Abstract: Design and simulation of a digitally controlled CMOS fully differential current conveyor (DCFDCC) is presented. A novel current division network (CDN) is used to provide the digital control of the current gain between terminals X and Z of this DCFDCC. The proposed DCFDCC operates under low supply voltage of /spl plusmn/1.5 V. The realization of the DCFDCC using the new CDN is presented by two approaches. First approach has linearly proportional current gain with the digitally controlled parameter of the CDN, while the second approach exhibits current gain between terminals X and Z greater than, or equal to, one. Applications of the DCFDCC in realizing second order universal active filter and variable gain amplifier are given. PSPICE simulation confirms the performance of the proposed blocks and its applications.

108 citations

Journal ArticleDOI
TL;DR: A new topology for realizing a grounded inductor employing only a single current conveyor, called a negative-type modified inverting second-generationCurrent conveyor (MICCII-), and a minimum number of passive components, two resistors, and one capacitor is presented.
Abstract: In this study, we present a new topology for realizing a grounded inductor employing only a single current conveyor, called a negative-type modified inverting second-generation current conveyor (MICCII-), and a minimum number of passive components, two resistors, and one capacitor. The non-ideality effects of the MICCII- on a simulated inductor are investigated. To demonstrate the performance of the presented inductance simulator, we use it to construct a third order Butterworth high-pass filter and a parallel resonant circuit. Simulation results are given to confirm the theoretical analysis.

90 citations