The Object Management Group's (OMG) Model Driven Architecture (MDA) strategy envisages a world where models play a more direct role in software production, being amenable to manipulation and transformation by machine. Model Driven Engineering (MDE) is wider in scope than MDA. MDE combines process and analysis with architecture. This article sets out a framework for model driven engineering, which can be used as a point of reference for activity in this area. It proposes an organisation of the modelling 'space' and how to locate models in that space. It discusses different kinds of mappings between models. It explains why process and architecture are tightly connected. It discusses the importance and nature of tools. It identifies the need for defining families of languages and transformations, and for developing techniques for generating/configuring tools from such definitions. It concludes with a call to align metamodelling with formal language engineering techniques.

Model Driven Engineering

The most visible use of computers and software is processing information for human consumption. The vast majority of computers in use, however, are much less visible. They run the engine, brakes, seatbelts, airbag, and audio system in your car. They digitally encode your voice and construct a radio signal to send it from your cell phone to a base station. They command robots on a factory floor, power generation in a power plant, processes in a chemical plant, and traffic lights in a city. These less visible computers are called embedded systems, and the software they run is called embedded software. The principal challenges in designing and analyzing embedded systems stem from their interaction with physical processes. This book takes a cyber-physical approach to embedded systems, introducing the engineering concepts underlying embedded systems as a technology and as a subject of study. The focus is on modeling, design, and analysis of cyber-physical systems, which integrate computation, networking, and physical processes. The second edition offers two new chapters, several new exercises, and other improvements. The book can be used as a textbook at the advanced undergraduate or introductory graduate level and as a professional reference for practicing engineers and computer scientists. Readers should have some familiarity with machine structures, computer programming, basic discrete mathematics and algorithms, and signals and systems.

Introduction to Embedded Systems - A Cyber-Physical Systems Approach

This paper focuses on the challenges of modeling cyber-physical systems (CPSs) that arise from the intrinsic heterogeneity, concurrency, and sensitivity to timing of such systems. It uses a portion of an aircraft vehicle management system (VMS), specifically the fuel management subsystem, to illustrate the challenges, and then discusses technologies that at least partially address the challenges. Specific technologies described include hybrid system modeling and simulation, concurrent and heterogeneous models of computation, the use of domain-specific ontologies to enhance modularity, and the joint modeling of functionality and implementation architectures.

Modeling Cyber–Physical Systems

This review covers research on the topic of mixed criticality systems that has been published since Vestal’s 2007 paper. It covers the period up to and including December 2015. The review is organised into the following topics: introduction and motivation, models, single processor analysis (including job-based, hard and soft tasks, fixed priority and EDF scheduling, shared resources and static and synchronous scheduling), multiprocessor analysis, related topics, realistic models, formal treatments, and systems issues. An appendix lists funded projects in the area of mixed criticality.

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Mixed Criticality Systems - A Review

Today the hardware for embedded systems is often specified in VHDL However, VHDL describes the system at a rather low level, which is cumbersome and may lead to design faults in large real life applications There is a need of higher level abstraction mechanisms In the embedded systems group of the University of Twente we are working on systematic and transformational methods to design hardware architectures, both multi core and single core The main line in this approach is to start with a straightforward (often mathematical) specification of the problem The next step is to find some adequate transformations on this specification, in particular to find specific optimizations, to be able to distribute the application over different cores The result of these transformations is then translated into the functional programming language Haskell since Haskell is close to mathematics and such a translation often is straightforward Besides, the Haskell code is executable, so one immediately has a simulation of the intended system Next, the resulting Haskell specification is given to a compiler, called CeaSH (for CAES LAnguage for Synchronous Hardware) which translates the specification into VHDL The resulting VHDL is synthesizable, so from there on standard VHDL-tooling can be used for synthesis In this work we primarily focus on streaming applications: ie applications that can be modeled as data-flow graphs At the moment the CeaSH system is ready in prototype form and in the presentation we will give several examples of how it can be used In these examples it will be shown that the specification code is clear and concise Furthermore, it is possible to use powerful abstraction mechanisms, such as polymorphism, higher order functions, pattern matching, lambda abstraction, partial application These features allow a designer to describe circuits in a more natural and concise way than possible with the language elements found in the traditional hardware description languages In addition we will give some examples of transformations that are possible in a mathematical specification, and which do not suffer from the problems encountered in, eg, automatic parallelization of nested for-loops in C-programs

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A mathematical approach towards hardware design

The scope of the formal system design (ForSyDe) methodology is high-level modeling and refinement of systems-on-a-chip and embedded systems. Starting with a formal specification model, that captures the functionality of the system at a high abstraction level, it provides formal design-transformation methods for a transparent refinement process of the system model into an implementation model that is optimized for synthesis. The main contribution of this paper is the ForSyDe modeling technique and the formal treatment of transformational design refinement. We introduce process constructors, that cleanly separate the computation part of a process from the synchronization and communication part. We develop the characteristic function for each process type and use it to define semantic preserving and design decision transformations. In a study of a digital equalizer example, we illustrate the modeling and refinement process and focus in particular on refinement of the clock domain, communication refinement, and resource sharing.

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System modeling and transformational design refinement in ForSyDe [formal system design]

Models of computation (MoC) are reviewed and organised with respect to the time abstraction they use. Continuous time, discrete time, synchronous and untimed MoCs are distinguished. System level models serve a variety of objectives with partially contradicting requirements. Consequently, it is argued that different MoCs are necessary for the various tasks and phases in the design of an embedded system. Moreover, different MoCs have to be integrated to provide a coherent system modelling and analysis environment. The relation between some popular languages and the reviewed MoCs is discussed to find that a given MoC is offered by many languages and a single language can support multiple MoCs. It is contended that it is of importance for the quality of tools and overall design productivity, which abstraction levels and which primitive operators are provided in a language. However, it is observed that there are various flexible ways to do this, e.g. by way of heterogeneous frameworks, coordination languages and embedding of different MoCs in the same language.

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Models of computation and languages for embedded system design

Advances in microelectronics allow the integration of more andmore functionality on a single chip. Emerging system-on-a-chiparchitectures include a large amount of heterogeneous componentsand are of increasing complexity. Applications using thesearchitectures require many low-level details in order to yield anefficient implementation. On the other hand constanttime-to-market pressure on electronic systems demands a shortdesign process that allows to model a system at a highabstraction level, not taking low-level implementation detailsinto account. Clearly there is a significant abstraction gapbetween an ideal model for specification and another one forimplementation. This abstraction gap has to be addressed bymethodologies for electronic system design.This thesis presents the ForSyDe (Formal System Design)methodology, which has been developed with the objective to movesystem design to a higher level of abstraction and to bridge theabstraction gap by transformational design refinement. ForSyDe isbased on carefully selected formal foundations. The initialspecification model uses a synchronous model of computation,which separates communication from computation and has anabstract notion of time. ForSyDe uses the concept of processconstructors to implement the synchronous model, to allow fordesign transformation and the mapping of a refined model onto thetarget architecture. The specification model is refined into adetailed implementation model by the stepwise application ofwell-defined design transformation rules. These rules are eithersemantic preserving or they inflict a design decision modifyingthe semantics. These design decisions are used to introduce thelow-level implementation details that are needed for an efficientimplementation. The implementation model is mapped onto thecomponents of the target architecture. At present ForSyDe modelscan be mapped onto VHDL or C/C++ in order to allow commercialtools to generate custom hardware or sequential software. Thethesis uses a digital equalizer to illustrate the concepts andpotential of ForSyDe.Electronic System Design, Hardware/Software Co-Design,Electrical Engineering

System Modeling and Design Refinement in ForSyDe

The feasibility of a message in a network concerns if its timing property can be satisfied without jeopardizing any messages already in the network to meet their timing properties. We present a novel feasibility analysis for real-time (RT) and nonreal-time (NT) messages in wormhole-routed networks on chip. For RT messages, we formulate a contention tree that captures contentions in the network. For coexisting RT and NT messages, we propose a simple bandwidth partitioning method that allows us to analyze their feasibility independently.

Feasibility analysis of messages for on-chip networks using wormhole routing

Electronic System Level (ESL) design of embedded systems proposes raising the abstraction level of the design entry to cope with the increasing complexity of such systems. To exploit the benefits of ESL, design languages should allow specification of models which are a) heterogeneous, to describe different aspects of systems; b) formally defined, for application of analysis and synthesis methods; c) executable, to enable early detection of specification; and d) parallel, to exploit the multi- and many-core platforms for simulation and implementation. We present a modeling library on top of SystemC, targeting heterogeneous embedded system design, based on four models of computation. The library has a formal basis where all elements are well defined and lead in construction of analyzable models. The semantics of communication and computation are implemented by the library, which allows the designer to focus on specifying the pure functional aspects. A key advantage is that the formalism is used to export the structure and behavior of the models via introspection as an abstract representation for further analysis and synthesis.

Ingo Sander

Papers

System modeling and transformational design refinement in ForSyDe [formal system design]

Models of computation and languages for embedded system design

System Modeling and Design Refinement in ForSyDe

Feasibility analysis of messages for on-chip networks using wormhole routing

Formal heterogeneous system modeling with SystemC