Inyup Kang

Bio: Inyup Kang is an academic researcher from Samsung. The author has contributed to research in topics: Decoding methods & Signal. The author has an hindex of 24, co-authored 195 publications receiving 2721 citations. Previous affiliations of Inyup Kang include Qualcomm & Seoul National University.

Advanced interference management for 5G cellular networks

Abstract: As 4G cellular systems densify their cell deployment, co-channel interference becomes a major source of obstacles to cell throughput improvement. In addition, cell edge users suffer more from co-channel interference, which may govern end users? experiences. Although some network-side solutions for co-channel interference management have been introduced in current 4G standards, it turns out that most of those solutions yield only meager gains in realistic cellular environments. In this article, we pay attention to recent advances in the network information theory and discuss the benefits of UE-side approaches. Based on this understanding, we provide our vision on advanced interference management for 5G cellular systems: network-side interference management needs to be complemented by UE-side interference management to realize true factor-one resource reuse. We also discuss practical challenges to deploy advanced interference management and their implications on 5G system design. Prospective gains of advanced interference management are demonstrated, and it is shown that the benefits of advanced receivers can be well exploited if 5G cellular networks employ elaborated joint scheduling.

Low-power Viterbi decoder for CDMA mobile terminals

Abstract: An efficient state-sequential very large scale integration (VLSI) architecture and low-power design methodologies ranging from the system-level to the layout-level are presented for a large-constraint-length Viterbi decoder for code division multiple access (CDMA) digital cellular/personal communication services (PCS) applications. The low-power design approaches are also applicable to many other systems and algorithms. VLSI implementation issues and prototype fabrication results for a state-sequential Viterbi decoder for convolutional codes of rate 1/2 and constraint-length 9 are also described. The chip's core, consisting of approximately 65 k transistors, occupies 1.9 mm by 3.4 mm in a 0.8-/spl mu/m triple-layer-metal n-well CMOS technology. The chip's measured total power dissipation is 0.24 mW at a 14.4 kb/s data-rate with 0.9216 MHz clocking at a supply voltage of 1.65 V. The Viterbi decoder presented here is the lowest power and smallest area core in its class, to the best of our knowledge.

LTE-advanced modem design: challenges and perspectives

Abstract: The commercial deployment of LTE Release 8 is gaining significant momentum all over the globe, and LTE is evolving to LTE-Advanced, which offers various new features to meet or exceed IMT-Advanced requirements. Since LTE-Advanced targets ambitious spectral efficiency and peak throughput, it poses tremendous system design challenges to operators and manufacturers, especially for mobile terminals. This article discusses modem design issues related to carrier aggregation, enhanced ICIC for HetNet, detection of eight-layer transmission, reference signals for enhanced multi-antenna support, and HARQ buffer management. We provide an overview of technical challenges and sketch the perspectives for tackling them to exploit the full benefits of the LTE-Advanced system.

Direct conversion receiver architecture

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus The DVGA may be advantageously designed and located as described herein The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode The controls for some or all of the RF/analog circuitry may be provided via the serial bus

Direct memory swapping between NAND flash and SRAM with error correction coding

Abstract: Memory architectures and techniques that support direct memory swapping between NAND Flash and SRAM with error correction coding (ECC). In a specific design, a memory architecture includes a first storage unit (e.g., an SRAM) operative to provide storage of data, a second storage unit (e.g., a NAND Flash) operative to provide (mass) storage of data, an EMI unit implemented within an ASIC and operative to provide control signals for the storage units, and a data bus coupled to both storage units and the EMI unit. The two storage units are implemented external to the ASIC, and each storage unit is operable to store data from the other storage unit via the data bus when the other storage unit is being accessed by the EMI unit. The EMI unit may include an ECC unit operative to perform block coding of data transferred to/from the second storage unit.

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

On the capacity of a cellular CDMA system

Abstract: It is shown that, particularly for terrestrial cellular telephony, the interference-suppression feature of CDMA (code division multiple access) can result in a many-fold increase in capacity over analog and even over competing digital techniques. A single-cell system, such as a hubbed satellite network, is addressed, and the basic expression for capacity is developed. The corresponding expressions for a multiple-cell system are derived. and the distribution on the number of users supportable per cell is determined. It is concluded that properly augmented and power-controlled multiple-cell CDMA promises a quantum increase in current cellular capacity. >

Next Generation 5G Wireless Networks: A Comprehensive Survey

Abstract: The vision of next generation 5G wireless communications lies in providing very high data rates (typically of Gbps order), extremely low latency, manifold increase in base station capacity, and significant improvement in users’ perceived quality of service (QoS), compared to current 4G LTE networks. Ever increasing proliferation of smart devices, introduction of new emerging multimedia applications, together with an exponential rise in wireless data (multimedia) demand and usage is already creating a significant burden on existing cellular networks. 5G wireless systems, with improved data rates, capacity, latency, and QoS are expected to be the panacea of most of the current cellular networks’ problems. In this survey, we make an exhaustive review of wireless evolution toward 5G networks. We first discuss the new architectural changes associated with the radio access network (RAN) design, including air interfaces, smart antennas, cloud and heterogeneous RAN. Subsequently, we make an in-depth survey of underlying novel mm-wave physical layer technologies, encompassing new channel model estimation, directional antenna design, beamforming algorithms, and massive MIMO technologies. Next, the details of MAC layer protocols and multiplexing schemes needed to efficiently support this new physical layer are discussed. We also look into the killer applications, considered as the major driving force behind 5G. In order to understand the improved user experience, we provide highlights of new QoS, QoE, and SON features associated with the 5G evolution. For alleviating the increased network energy consumption and operating expenditure, we make a detail review on energy awareness and cost efficiency. As understanding the current status of 5G implementation is important for its eventual commercialization, we also discuss relevant field trials, drive tests, and simulation experiments. Finally, we point out major existing research issues and identify possible future research directions.

A Survey of 5G Network: Architecture and Emerging Technologies

Abstract: In the near future, i.e., beyond 4G, some of the prime objectives or demands that need to be addressed are increased capacity, improved data rate, decreased latency, and better quality of service. To meet these demands, drastic improvements need to be made in cellular network architecture. This paper presents the results of a detailed survey on the fifth generation (5G) cellular network architecture and some of the key emerging technologies that are helpful in improving the architecture and meeting the demands of users. In this detailed survey, the prime focus is on the 5G cellular network architecture, massive multiple input multiple output technology, and device-to-device communication (D2D). Along with this, some of the emerging technologies that are addressed in this paper include interference management, spectrum sharing with cognitive radio, ultra-dense networks, multi-radio access technology association, full duplex radios, millimeter wave solutions for 5G cellular networks, and cloud technologies for 5G radio access networks and software defined networks. In this paper, a general probable 5G cellular network architecture is proposed, which shows that D2D, small cell access points, network cloud, and the Internet of Things can be a part of 5G cellular network architecture. A detailed survey is included regarding current research projects being conducted in different countries by research groups and institutions that are working on 5G technologies.