Ivo Bolsens

Bio: Ivo Bolsens is an academic researcher from Xilinx. The author has contributed to research in topics: Application-specific integrated circuit & Wavelet transform. The author has an hindex of 24, co-authored 84 publications receiving 2409 citations. Previous affiliations of Ivo Bolsens include Katholieke Universiteit Leuven & IMEC.

Programmable modem apparatus for transmitting and receiving digital data, design method and use method for said modem

Abstract: The programmable modem for digital data of the present invention provides a highly programmable, digital modem implemented in an integrated circuit which can be customized to specific applications. The programmable modem uses spread spectrum techniques and is specifically programmable to alter the parameters of the modem to improve performance. The present invention also provides a systematic method and development kit to provide rapid customization of a modem for a particular application or for rapid specification of a high-performance application specific integrated circuit mode.

CoWare-a design environment for heterogeneous hardware/software systems

Abstract: The design problems encountered when designing heterogeneous systems are studied and solutions to these problems are proposed. It is shown why a single heterogeneous specification method ranging from concept to architecture is required and why it should cover issues as modularity design for reuse, reuse of designs and reuse of design environments. A heterogeneous system design environment based on cospecification, cosimulation and cosynthesis is proposed and its application is illustrated by means of a spread spectrum based pager system.

Fast, cheap and under control: the next implementation fabric

Abstract: Overview The semiconductor industry is caught on two horns of the economics dilemma: (1) the economics of technology deepsubwavelength lithography and equipment cost, reticle enhancement technology and mask cost, and manufacturing variability and yield; and (2) the economics of design productivity design turnaround time, availability of design skills, and portability of design effort. Standard-cells and the RTL methodology have taken us into the 90nm generation, but design is slow, expensive, and out of control. What we need is a next-generation fabric that will once again provide designers with “fast, cheap, and under control” implementation. The question: which fabric? How deeply must the concept of regularity be engrained in the silicon implementation fabric to enable adequate yield and cost control in the face of CD variation and high mask NRE cost? Via-programmable fabrics such as eASIC (VPGA) provide an intermediate design point in the cost-density-performance space, but is this offering sufficiently attractive (let alone defensible)? Or, will traditional FPGAs continue to take up more of the market, starting from their foothold in low-volume and/or reconfigurable applications? On the other hand, regularity and programmability incur cost and performance losses as they abandon the leading edge of the scaling curve. Are such losses growing, and will we therefore always see viable ASIC and COT businesses? Finally, what are the views and needs of the platform SOC and pure-play foundry constituencies?

Analysis and experimental verification of digital substrate noise generation for epi-type substrates

Abstract: Substrate coupling in mixed-signal IC's can cause important performance degradation of the analog circuits Accurate simulation is therefore needed to investigate the generation, propagation, and impact of substrate noise Recent studies were limited to the time-domain behavior of generated substrate noise and to noise injection from a single noise source This paper focuses on substrate noise generation by digital circuits and on the spectral content of this noise To simulate the noise generation, a SPICE substrate model for heavily doped epi-type substrates has been used The accuracy of this model has been verified with measurements of substrate noise, using a wide-band, continuous-time substrate noise sensor, which allows accurate measurement of the spectral content of substrate noise The substrate noise generation of digital circuits is analyzed, both in the time and frequency domain, and the influence of the different substrate noise coupling mechanisms is demonstrated It is shown that substrate noise voltages up to 20 mV are generated and that, in the frequency band up to 1 GHz, noise peaks are generated at multiples of the clock and repetition frequency These noise signals will strongly deteriorate the behavior of small signal analog amplifiers, as used in integrated front-ends

Hierarchical Data Collection Network Supporting Packetized Voice Communications Among Wireless Terminals and Telephones

Abstract: A packet-based, hierarchical communication system, arranged in a spanning tree configuration, is described in which wired and wireless communication networks exhibiting substantially different characteristics are employed in an overall scheme to link portable or mobile computing devices. The network accommodates real time voice transmission both through dedicated, scheduled bandwidth and through a packet-based routing within the confines and constraints of a data network. Conversion and call processing circuitry is also disclosed which enables access devices and personal computers to adapt voice information between analog voice stream and digital voice packet formats as proves necessary. Routing pathways include wireless spanning tree networks, wide area networks, telephone switching networks, internet, etc., in a manner virtually transparent to the user. A voice session and associate call setup simulates that of conventional telephone switching network, providing well-understood functionality common to any mobile, remote or stationary terminal, phone, computer, etc.

Theory and practice of error control codes

Abstract: algorithmics and modular computations, Theory of Codes and Cryptography (3).From an analytical 1. RE Blahut. Theory and practice of error control codes. eecs.uottawa.ca/∼yongacog/courses/coding/ (3) R.E. Blahut,Theory and Practice of Error Control Codes, Addison Wesley, 1983. QA 268. Cached. Download as a PDF 457, Theory and Practice of Error Control CodesBlahut 1984 (Show Context). Citation Context..ontinued fractions.

Computer-aided design of analog and mixed-signal integrated circuits

Abstract: This survey presents an overview of recent advances in the state of the art for computer-aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog blocks typically constitute only a small fraction of the components on mixed-signal ICs and emerging systems-on-a-chip (SoC) designs. But due to the increasing levels of integration available in silicon technology and the growing requirement for digital systems to communicate with the continuous-valued external world, there is a growing need for CAD tools that increase the design productivity and improve the quality of analog integrated circuits. This paper describes the motivation and evolution of these tools and outlines progress on the various design problems involved: simulation and modeling, symbolic analysis, synthesis and optimization, layout generation, yield analysis and design centering, and test. This paper summarizes the problems for which viable solutions are emerging and those which are still unsolved.

Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

Abstract: An experimental technique is described for observing the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprising an epitaxial layer grown on a heavily doped bulk wafer Observations indicate that reducing the inductance in the substrate bias is the most effective Device simulations are used to show how crosstalk propagates via the heavily doped bulk and to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry A method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates is developed >