J. Godoy Fo

Bio: J. Godoy Fo is an academic researcher from State University of Campinas. The author has contributed to research in topics: Semiconductor & Work function. The author has an hindex of 2, co-authored 3 publications receiving 65 citations.

Formation of Ultra-Thin Silicon Oxynitride Films by Low-Energy Nitrogen Implantation.

Abstract: Oxynitrides (SiOxNy) have been used as gate insulators for submicron devices [1]. The present work reports the oxynitride formation at SiO2/Si structure by N2 + implantation at low energies. Si substrates were implanted with N2 + ion beams (energy = 5.6 keV and dose =1×10 ions/cm2), annealed at 950°C for 30 min in N2 ambient, oxidized at 950°C in O2 + 1% TCE environment and annealed at 950°C for 30 min in N2. After these process steps, the oxynitride formation was investigated by FTIR, SIMS and ellipsometric analysis. These physical characterizations revealed the presence of Si-0 and Si-N bonds. The film thicknesses and refractive indexes were 7 nm and 1.62, respectively. The dielectric constant = 4.39 and effective charge density = 7xl010 cm–2 were determined by C-V, indicating that the SiOxNy films formed are suitable gate insulators for MOS devices.

Next generation high-k dielectrics for DRAM produced by atomic layer deposition studied by transmission electron microscopy

Abstract: Schlusselelemente der heutigen Technologie wie der dynamische random-access memory (DRAM) folgen dem Trend der Miniaturisierung. Das verlangt, dass die dielektrische Schicht, die eine wichtige Komponente in diesen Strukturen ist, dunner wird. Da die Miniaturisierung schnell voranschreitet, nahern sich die Geratekomponenten den fundamentalen physikalischen Limitierungen. Es gibt zwei Hauptstrategien um die Kapazitat zu erhohen, ohne die Dicke der dielektrischen Schicht weiter zu verringern. Eine ist es, Oberflachen zu nutzen die ein hohes Aspektverhaltnis (AV) aufweisen, um die effektive Oberflache zu vergrosern. Die andere ist es, high-k Materialien anstatt SiO2 zu verwenden. Die Schlusseltechnologie um ultra-dunne, high-k dielektrische Schichten gleichmasig und ohne jeglicher Locher auf Substrate mit hohem AV aufzutragen ist atomic layer deposition (ALD, wtl. Atomlagenabscheidung). ALD ist eine Art von chemischer Gasphasenabscheidung, in der die chemische Reaktion in zwei sequenzielle, selbst-limitierende Reaktionen mit der Oberflache aufgeteilt wird, was Filme mit hoher Qualitat und guter Uniformitat gewahrleistet. Plasma-erweitertes ALD (PEALD) ist eine eher neue Erweiterung in der Plasma Teilchen anstatt Wasserdampf zur Oxidierung verwendet werden. In dieser Dissertation wird Arbeit zu PEALD von TiO2 auf Graben mit hohem AV prasentiert und mit Transmissionselektronenmikroskopie (TEM) untersucht. TEM zeigt, dass die Uberdeckung von PEALD TiO2 auf diesen Substraten verbessert werden kann indem man die Plasma Einwirkungszeit verlangert. Dann wird PEALD von dem high-k Perowskit BaTiO3 (BTO) untersucht. Zuletzt berichten wir die besten elektrischen Betriebseigenschaften fur Al-dotiertes BTO aufgetragen auf einer Zr-dotierten TiN Elektrode. Wir glauben, dass diese Resultate das Sprungbrett fur die nachsten Generationen von high-k dielektrischen Filmen fur DRAM sein konnte.

III–V/Ge channel MOS device technologies in nano CMOS era

Abstract: CMOS utilizing high-mobility III–V/Ge channels on Si substrates is expected to be one of the promising devices for high-performance and low power advanced LSIs in the future, because of its enhanced carrier transport properties. However, there are many critical issues and difficult challenges for realizing III–V/Ge-based CMOS on the Si platform such as (1) the formation of high-crystal-quality Ge/III–V films on Si substrates, (2) gate stack technologies to realize superior MOS/MIS interface quality, (3) the formation of a source/drain (S/D) with low resistivity and low leakage current, (4) process integration to realize ultrashort channel devices, and (5) total CMOS integration including Si CMOS. In this paper, we review the recent progress in III–V/Ge MOS devices and process technologies as viable approaches to solve the above critical problems on the basis of our recent research activities. The technologies include MOS gate stack formation, high-quality channel formation, low-resistance S/D formation, and CMOS integration. For the Ge device technologies, we focus on the gate stack technology and Ge channel formation on Si. Also, for the III–V MOS device technologies, we mainly address the gate stack technology, III–V channel formation on Si, the metal S/D technology, and implementation of these technologies into short-channel III–V-OI MOSFETs on Si substrates. On the basis of the present status of the achievements, we finally discuss the possibility of various CMOS structures using III–V/Ge channels.

Metal gate work function tuning by Al incorporation in TiN

Abstract: Titanium nitride (TiN) films have been used as gate electrode on metal-oxide-semiconductor (MOS) devices. TiN effective work function (EWF) values have been often reported as suitable for pMOS. For nMOS devices, a gate electrode with sufficient low EWF value with a similar robustness as TiN is a challenge. Thus, in this work, aluminum (Al) is incorporated into the TiN layer to reduce the EWF values, which allows the use of this electrode in nMOS devices. Titanium aluminum (TiAl), Al, and aluminum nitride (AlN) layers were introduced between the high-k (HfO2) dielectric and TiN electrode as Al diffusion sources. Pt/TiN (with Al diffusion) and Pt/TiN/TiAl/TiN structures were obtained and TiN EWF values were reduced of 0.37 eV and 1.09 eV, respectively. The study of TiN/AlN/HfO2/SiO2/Si/Al structures demonstrated that AlN layer can be used as an alternative film for TiN EWF tuning. A decrease of 0.26 eV and 0.45 eV on TiN EWF values were extracted from AlN/TiN stack and AlN/TiN laminate stack, respectively. AlN/TiN laminate structures have been shown to be more effective to reduce the TiN work function than just increasing the AlN thickness.

Interplay between ferroelectric and resistive switching in doped crystalline HfO2

Abstract: Hafnium oxide is widely used for resistive switching devices, and recently it has been discovered that ferroelectricity can be established in (un-)doped hafnium oxide as well. Previous studies showed that both switching mechanisms are influenced by oxygen vacancies. For resistive switching, typically amorphous oxide layers with an asymmetric electrode configuration are used to create a gradient of oxygen vacancies. On the other hand, ferroelectric switching is performed by having symmetric electrodes and requires crystalline structures. The coexistence of both effects has recently been demonstrated. In this work, a detailed analysis of the reversible interplay of both switching mechanisms within a single capacitor cell is investigated. First, ferroelectric switching cycles were applied in order to drive the sample into the fatigued stage characterized by increased concentration of oxygen vacancies in the oxide layer. Afterwards, a forming step that is typical for the resistive switching devices was utiliz...