J. Jussot

TL;DR: In this article, the authors show that scaling the top-contact length to 13nm induces no penalty on the electrical characteristics for CVD MoS 2 FETs and demonstrate this for devices with different gate-oxides and operating in both channel and contact-limited regimes, thus confirming carrier injection at the edge of the contact metal.

TL;DR: In this article, Niobium resonators after removing native oxides by HF etching were shown to yield a quality factor of $7.5$ in the single-photon limit, where Nb is the only surface oxide that grows significantly in the first week.

TL;DR: In this paper, the scaling behavior of large-area grown MoS2 material with channel length down to 30nm and capacitive effective oxide thickness (CET) down to 1.9nm was investigated.

TL;DR: In this paper, the authors combine multiphysics simulation methods to assemble a comprehensive design methodology for silicon qubit devices, which is summarized by modeling device electrostatics, stress, micro-magnetics, band structure and spin dynamics.

TL;DR: In this paper , the authors demonstrate a fully CMOS compatible qubit fabrication method, and show results from overlap Josephson junction devices with long coherence and relaxation times, on par with the state-of-the-art.