Jack C. Lee
Other affiliations: University of California, Berkeley
Bio: Jack C. Lee is an academic researcher from University of Texas at Austin. The author has contributed to research in topics: Gate dielectric & Dielectric. The author has an hindex of 45, co-authored 290 publications receiving 7526 citations. Previous affiliations of Jack C. Lee include University of California, Berkeley.
Papers published on a yearly basis
TL;DR: In this article, the dielectric properties of ultrathin hafnium oxide reoxidized with rapid thermal annealing (RTA) have been investigated and the leakage current was found to be less than 3×10−2 ǫA/cm2 at −1.5 V (i.e., ∼2 V below VFB).
Abstract: Dielectric properties of ultrathin hafnium oxide reoxidized with rapid thermal annealing (RTA) have been investigated. Capacitance equivalent oxide thickness (CET) of 45 A hafnium oxide was scaled down to ∼10 A with a leakage current less than 3×10−2 A/cm2 at −1.5 V (i.e., ∼2 V below VFB). Leakage current increase due to crystallization was not observed even after 900 °C rapid thermal annealing (RTA), but CET did increase after high temperature RTA due to the interfacial layer growth and possible silicate formation in the HfO2 film.
TL;DR: In this article, a technique of predicting the lifetime of an oxide to different voltages, different oxide areas, and different temperatures is presented using the defect density model in which defects are modeled as effective oxide thinning, many reliability parameters such as yield, failure rate and screen time/screen yield can be predicted.
Abstract: A technique of predicting the lifetime of an oxide to different voltages, different oxide areas, and different temperatures is presented. Using the defect density model in which defects are modeled as effective oxide thinning, many reliability parameters such as yield, failure rate, and screen time/screen yield can be predicted. This modeling procedure is applicable to both wafer-level and long-term reliability tests. Process improvements including defect gettering and alternative dielectrics such as chemical-vapor-deposited oxides are evaluated in the format of defect density as a function of effective oxide thinning. >
TL;DR: It is shown that a silicon-based photocathode with a capping epitaxial oxide layer can provide efficient and stable hydrogen production from water and be highly dependent on the size and spacing of the structured metal catalyst.
Abstract: The rapidly increasing global demand for energy combined with the environmental impact of fossil fuels has spurred the search for alternative sources of clean energy. One promising approach is to convert solar energy into hydrogen fuel using photoelectrochemical cells. However, the semiconducting photoelectrodes used in these cells typically have low efficiencies and/or stabilities. Here we show that a silicon-based photocathode with a capping epitaxial oxide layer can provide efficient and stable hydrogen production from water. In particular, a thin epitaxial layer of strontium titanate (SrTiO3) was grown directly on Si(001) by molecular beam epitaxy. Photogenerated electrons can be transported easily through this layer because of the conduction-band alignment and lattice match between single-crystalline SrTiO3 and silicon. The approach was used to create a metal–insulator–semiconductor photocathode that, under a broad-spectrum illumination at 100 mW cm−2, exhibits a maximum photocurrent density of 35 mA cm−2 and an open circuit potential of 450 mV; there was no observable decrease in performance after 35 hours of operation in 0.5 M H2SO4. The performance of the photocathode was also found to be highly dependent on the size and spacing of the structured metal catalyst. Therefore, mesh-like Ti/Pt nanostructured catalysts were created using a nanosphere lithography lift-off process and an applied-bias photon-to-current efficiency of 4.9% was achieved. A silicon-based photocathode with an epitaxial strontium titanate protection layer and a mesh-like nanostructured catalyst can provide an applied bias photon-to-current efficiency of 4.9% for water reduction.
TL;DR: In this paper, the interfacial chemistry of the high-k dielectric HfO2 has been investigated on nitrided and un-nitrided Si(100) using x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrograph (SIMS).
Abstract: The interfacial chemistry of the high-k dielectric HfO2 has been investigated on nitrided and un-nitrided Si(100) using x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS). The samples are prepared by sputter depositing Hf metal and subsequently oxidizing it. A 600 °C densification anneal is critical to completing Hf oxidation. These spectroscopic data complement electrical testing of metal oxide semiconductor capacitors fabricated with ∼50 A HfO2 on nitrided and un-nitrided Si(100). Capacitors with interfacial nitride show reduced leakage current by a factor of 100 at a −1 V bias. Concurrently, interfacial nitride increased capacitance 12% at saturation. XPS shows that an interfacial layer composed of nonstoichiometric hafnium silicate (HfSixOy), forms at both the HfO2/Si and HfO2/SiNx interfaces. Differences in the Si 2p and O 1s XP spectra suggest more silicate forms at the un-nitrided interface. HfO2 films on un-nitrided Si show more O 1s and Si 2p photoemission intensity...
TL;DR: In this paper, a unique process to grow high quality ultrathin gate dielectrics using N2O (nitrous oxide) gas was presented, which showed very large charge-to-breakdown and less charge trapping under constant current stress.
Abstract: This letter presents a unique process to grow high quality ultrathin (∼60 A) gate dielectrics using N2O (nitrous oxide) gas Compared with conventional rapid thermally grown oxide in the O2, the new oxynitride dielectrics show very large charge‐to‐breakdown (at +50 mA/cm2, 850 C/cm2 for oxynitride compared to 95 C/cm2 for the control thermal oxide) and less charge trapping under constant current stress Significantly reduced interface state generation was also observed under constant current stress and x‐ray radiation A secondary‐ion mass spectroscopy depth profile indicates a nitrogen‐rich layer at the Si/SiO2 interface, which can explain the improved integrity of oxynitride dielectric
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...
University of Cambridge1, Istituto Italiano di Tecnologia2, Lancaster University3, University of Manchester4, Catalan Institution for Research and Advanced Studies5, Technical University of Denmark6, Nokia7, fondazione bruno kessler8, University of Trento9, Queen Mary University of London10, Technische Universität München11, Polytechnic University of Milan12, Centre national de la recherche scientifique13, University of Trieste14, University of Ioannina15, University of Geneva16, Trinity College, Dublin17, Texas Instruments18, University of Paris19, Spanish National Research Council20, Leiden University21, Delft University of Technology22, University of Patras23, École Normale Supérieure24, Radboud University Nijmegen25, Nest Labs26, Airbus UK27, Seoul National University28, Yonsei University29, University of Oxford30, Chalmers University of Technology31, University of Groningen32, STMicroelectronics33, Chemnitz University of Technology34, Max Planck Society35, Aalto University36
TL;DR: An overview of the key aspects of graphene and related materials, ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries are provided.
Abstract: We present the science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems, targeting an evolution in technology, that might lead to impacts and benefits reaching into most areas of society. This roadmap was developed within the framework of the European Graphene Flagship and outlines the main targets and research areas as best understood at the start of this ambitious project. We provide an overview of the key aspects of graphene and related materials (GRMs), ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries. We also define an extensive list of acronyms in an effort to standardize the nomenclature in this emerging field.
TL;DR: Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Abstract: Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
TL;DR: In this paper, the Schottky barrier heights and band offsets for high dielectric constant oxides on Pt and Si were calculated and good agreement with experiment is found for barrier heights.
Abstract: Wide-band-gap oxides such as SrTiO3 are shown to be critical tests of theories of Schottky barrier heights based on metal-induced gap states and charge neutrality levels. This theory is reviewed and used to calculate the Schottky barrier heights and band offsets for many important high dielectric constant oxides on Pt and Si. Good agreement with experiment is found for barrier heights. The band offsets for electrons on Si are found to be small for many key oxides such as SrTiO3 and Ta2O5 which limit their utility as gate oxides in future silicon field effect transistors. The calculations are extended to screen other proposed oxides such as BaZrO3. ZrO2, HfO2, La2O3, Y2O3, HfSiO4, and ZrSiO4. Predictions are also given for barrier heights of the ferroelectric oxides Pb1−xZrxTiO3 and SrBi2Ta2O9 which are used in nonvolatile memories.
TL;DR: In this article, a review of the development of high-k gate oxides such as hafnium oxide (HFO) and high-K oxides is presented, with the focus on the work function control in metal gate electrodes.
Abstract: The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (14?nm) that its leakage current is too large It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (?) or 'high K' gate oxides such as hafnium oxide and hafnium silicate These oxides had not been extensively studied like SiO2, and they were found to have inferior properties compared with SiO2, such as a tendency to crystallize and a high density of electronic defects Intensive research was needed to develop these oxides as high quality electronic materials This review covers both scientific and technological issues?the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure and reactions, their electronic structure, bonding, band offsets, electronic defects, charge trapping and conduction mechanisms, mobility degradation and flat band voltage shifts The oxygen vacancy is the dominant electron trap It is turning out that the oxides must be implemented in conjunction with metal gate electrodes, the development of which is further behind Issues about work function control in metal gate electrodes are discussed