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Jai Narayan Tripathi

Researcher at Indian Institute of Technology, Jodhpur

Publications -  87
Citations -  434

Jai Narayan Tripathi is an academic researcher from Indian Institute of Technology, Jodhpur. The author has contributed to research in topics: Jitter & Power integrity. The author has an hindex of 9, co-authored 65 publications receiving 247 citations. Previous affiliations of Jai Narayan Tripathi include STMicroelectronics & Indian Institutes of Technology.

Papers
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Journal ArticleDOI

A Review on Power Supply Induced Jitter

TL;DR: The primary focus of this paper is to discuss the modeling of jitter caused by power supply noise (PSN), named power supply induced jitter (PSIJ).
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Efficient Jitter Analysis for a Chain of CMOS Inverters

TL;DR: An efficient method to estimate jitter in a chain of CMOS inverters in the presence of multiple noise sources, including the power supply noise, input data noise, and the ground bounce noise is presented.
Journal ArticleDOI

Efficient Modeling of Power Supply Induced Jitter in Voltage-Mode Drivers (EMPSIJ)

TL;DR: In this paper, an efficient methodology for estimation of power supply induced jitter (PSIJ) in high-speed designs is presented, based on separating the large signal response and the small signal noise response and subsequently combining the results.
Proceedings ArticleDOI

Minimizing core supply noise in a power delivery network by optimization of decoupling capacitors using simulated annealing

TL;DR: In this paper, an optimal decoupling network is designed by Simulated Annealing to reduce the power supply noise in power delivery networks, which reduces the cumulative impedance of power delivery network.
Journal ArticleDOI

Selection and placement of decoupling capacitors in high speed systems

TL;DR: In this paper, the authors focus on damping cavity mode effects in power delivery networks by the particle swarm optimization technique and find the optimal capacitors and their locations on the board using the presented methodology.