High-level synthesis (HLS) is increasingly popular for the design of high-performance and energy-efficient heterogeneous systems, shortening time-to-market and addressing today’s system complexity. HLS allows designers to work at a higher-level of abstraction by using a software program to specify the hardware functionality. Additionally, HLS is particularly interesting for designing field-programmable gate array circuits, where hardware implementations can be easily refined and replaced in the target device. Recent years have seen much activity in the HLS research community, with a plethora of HLS tool offerings, from both industry and academia. All these tools may have different input languages, perform different internal optimizations, and produce results of different quality, even for the very same input description. Hence, it is challenging to compare their performance and understand which is the best for the hardware to be implemented. We present a comprehensive analysis of recent HLS tools, as well as overview the areas of active interest in the HLS research community. We also present a first-published methodology to evaluate different HLS tools. We use our methodology to compare one commercial and three academic tools on a common set of C benchmarks, aiming at performing an in-depth evaluation in terms of performance and the use of resources.

/pdf/a-survey-and-evaluation-of-fpga-high-level-synthesis-tools-4pv9ke4ji3.pdf

A Survey and Evaluation of FPGA High-Level Synthesis Tools

The amount of software in cars grows exponentially. Driving forces of this development are the availability of cheaper and more powerful hardware, as well as the demand for innovation through new functionality. The rapidly growing significance of software and software-based functionality is at the root of various challenges in the automotive industries. These concern their organization, definition of key competencies, processes, methods, tools, models, product structures, division of labor, logistics, maintenance, and long-term strategies. This paper pinpoints the idiosyncrasies of the domain, characterizes the essentials of automotive software, and discusses the challenges of automotive software engineering

https://mediatum.ub.tum.de/doc/1251761/file.pdf

Engineering Automotive Software

High-level synthesis (HLS) is being increasingly used for commercial VLSI designs. This has led to the proliferation of many HLS tools. In order to evaluate their performance and functionalities, a standard benchmark suite in a common language supported by all of them is required. This letter presents a benchmark suite, which complies with the latest Synthesizable SystemC standard, called S2CBench. The benchmarks have been carefully chosen to not only include applications of different sizes and from various domains typically used in HLS (e.g., encryption, image and DSP application), but also to test specific optimization techniques in each of them. This allows an easy comparison of not only quality of results (QoR) of the different HLS tools under review, but also to test their completeness.

S2CBench : synthesizable systemc benchmark suite for high-level synthesis

High-level synthesis promises a significant shortening of the FPGA design cycle when compared with design entry using register transfer level (RTL) languages. Recent evaluations report that C-to-RTL flows can produce results with a quality close to hand-crafted designs [1]. Algorithms which use dynamic, pointer-based data structures, which are common in software, remain difficult to implement well. In this paper, we describe a comparative case study using Xilinx Vivado HLS as an exemplary state-of-the-art high-level synthesis tool. Our test cases are two alternative algorithms for the same compute-intensive machine learning technique (clustering) with significantly different computational properties. We compare a data-flow centric implementation to a recursive tree traversal implementation which incorporates complex data-dependent control flow and makes use of pointer-linked data structures and dynamic memory allocation. The outcome of this case study is twofold: We confirm similar performance between the hand-written and automatically generated RTL designs for the first test case. The second case reveals a degradation in latency by a factor greater than 30× if the source code is not altered prior to high-level synthesis. We identify the reasons for this shortcoming and present code transformations that narrow the performance gap to a factor of four. We generalise our source-to-source transformations whose automation motivates research directions to improve high-level synthesis of dynamic data structures in the future.

/pdf/high-level-synthesis-of-dynamic-data-structures-a-case-study-36i34ka48t.pdf

High-level synthesis of dynamic data structures: A case study using Vivado HLS

Software-defined Radios: Architecture, state-of-the-art, and challenges

High-level synthesis (HLS) is an increasingly popular approach in electronic design automation (EDA) that raises the abstraction level for designing digital circuits. With the increasing complexity of embedded systems, these tools are particularly relevant in embedded systems design. In this paper, we present our evaluation of a broad selection of recent HLS tools in terms of capabilities, usability and quality of results. Even though HLS tools are still lacking some maturity, they are constantly improving and the industry is now starting to adopt them into their design flows.

https://www.cin.ufpe.br/~mel/pub/prototipac%E3o/referencias/HLS/art%253A10.1007%252Fs10617-012-9096-8_hls.pdf

An overview of today's high-level synthesis tools

This paper discusses the design and implementation of an in-car infotainment system, which uses the MOST field bus as a back-bone. The infotainment system is build around two ECU's (Embedded Computing Units) for which we used Xilinx FPGA's with integrated processor cores. An automotive camera and two other movie sources are connected with SPI interfaces to one ECU which streams the data to the other ECU over an optical link using the MOST protocol. As movie sources, a live stream from a satellite link and movies stored on a hard disk in the vehicle can be considered. Movies and other visual information are displayed on a 7 inch VGA TFT screen, integrated into the dashboard.

In-vehicle Movie Streaming Using an Embedded System with MOST Interface

Nowadays hardware design has become a very complex task due to the fact that programmable hardware, such as FPGA’s, becomes increasingly complex with regard to the number of transistors. In this paper, we will give an overview of some important tools for modelbased hardware design. Instead of starting from a complex, low-level VHDL or Verilog description, these tools enable to describe an algorithm in a model-based description. They even promise a totally automatic translation of this model-based description to HDL. These high level tools bring hardware design (based on FPGA’s) to a wider audience, while increasing designer productivity. We tested a selection of these model-based design tools on an image processing example, and examined their ease-of-use and effectiveness.

https://lirias.kuleuven.be/bitstream/123456789/297674/1/3210.pdf

Jan Meel

Papers

An overview of today's high-level synthesis tools

In-vehicle Movie Streaming Using an Embedded System with MOST Interface

Comparative study of model-based hardware design tools