Jason R. Andrews

Bio: Jason R. Andrews is an academic researcher. The author has contributed to research in topics: Hardware acceleration & Hardware compatibility list. The author has an hindex of 1, co-authored 1 publications receiving 25 citations.

Co-verification of Hardware and Software for ARM SoC Design

Abstract: 1. Embedded System Verification 2. Hardware and Software Design Process: System initialization software and hardware abstraction layer (HAL), Hardware diagnostic test suite, Real-time operating system (RTOS), RTOS device drivers, Application software, C simulation, Logic simulation, Simulation acceleration, Emulation, Prototype 3. SoC Verification Topics for the ARM Architecture 4. Hardware/Software Co-Verification: Host-code execution - implicit access, ISS + BIM, CCM, RTL, Hardware model,Emulation board, FPGA Prototype 5. Advanced Hardware/Software Co-Verification: Direct access to simulation memories without advancing simulation time, Memory and time optimizations - understanding synchronization, Cross network connections versus using a single workstation, C modeling for some of the hardware, Implicit Access,Post-processing techniques for software debugging, Synchronized software and hardware views for debugging, Post-processing software trace, Save/restore, How to deal with peripherals, How to deal with an RTOS 6. Hardware Verification Environment and Co-Verification: Testbench, The use of testbench tools, Random test generation based on CPU address map, CPU bus protocol checking, Functional/ Transaction coverage, Memory coverage, Property checking - did a specific scenario ever happen? Use of a design signoff model 7. Methodology for an Example ARM SoC.

Asset Management: A Systematic Approach to Factor Investing

Abstract: Preface: Asset Management Part I: The Asset Owner Chapter 1: Asset Owners Chapter 2: Preferences Chapter 3: Mean-Variance Investing Chapter 4: Investing for the Long Run Chapter 5: Investing Over the Life Cycle Part II: Factor Risk Premiums Chapter 6: Factor Theory Chapter 7: Factors Chapter 8: Equities Chapter 9: Bonds Chapter 10: Alpha (and the Low Risk Anomaly) Chapter 11: " Assets Chapter 12: Tax-Efficient Investing Chapter 13: Illiquid Assets Chapter 14: Factor Investing Part III: Delegated Portfolio Management Chapter 15: Delegated Investing Chapter 16: Mutual Funds and Other 40-Act Funds Chapter 17: Hedge Funds Chapter 18: Private Equity Afterword: Factor Management Appendix: Returns Acknowledgements Bibliography Index

Verification of temporal properties in automotive embedded software

Abstract: The amount of software in embedded systems has increased significantly over the last years and, therefore, the verification of embedded software is of fundamental importance. One of the main problems in embedded software is to verify variables and functions based on temporal properties. Formal property verification using model checker often suffers from the state space explosion problem when a large software design is considered. In this paper, we propose two new approaches to integrate assertions in the verification of embedded software using simulation-based verification. Firstly, we extended a SystemC hardware temporal checker with interfaces in order to monitor the embedded software variables and functions that are stored in a microprocessor memory model. Secondly, we derived a SystemC model from the original C program in order to integrate directly with the SystemC temporal checker. We performed a case study on an embedded software from automotive industry which is responsible for controlling read and write requests to a non-volatile memory.

Coverage Driven Verification applied to Embedded Software

Abstract: The verification of complex systems, like embedded real time systems as well as SoCs, can not only be considered on hardware module level anymore. The amount of software has increased over the last years and, therefore, the verification of embedded software has got a fundamental importance. One of the main problems in embedded software verification is to stress and cover variables and functions in the embedded software that is already running on microprocessor models, during the design phase. In this paper we present a novel approach to verify embedded software running on a microprocessor model, based on a coverage driven verification technique. We have combined a new application called generic software adapter with a SystemC PowerPC microprocessor model in order to cover difficult corner case scenarios in embedded software. This approach avoids setting several parameters and registers during the initialization when no microprocessor model is used. The embedded software is a case study from the automotive industry which is responsible for controlling read and write requests to a non-volatile memory

Embedded Network Firewall on FPGA

Abstract: This paper describes the design of a highly customizable hardware packet filtering firewall to be embedded on a network gateway. This firewall has the ability to process the data packets based on source and destination TCP/UDP port number, source and destination IPaddress range, source MAC address and combination of source IP address, and destination port number. It is capable of accepting configuration changes in real time. An Alter a FPGA platform has been used for implementing and evaluating the network firewall.