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Showing papers by "Jean-Michel Portal published in 2010"


Proceedings ArticleDOI
13 Dec 2010
TL;DR: In this paper, two narrow parasitic MOS are introduced in parallel with the main device to simulate matching degradation in sub-threshold mode, in case of hump effect, have to be considered.
Abstract: Analog circuit designs are often biased to work in sub-threshold mode with good gate-source voltage matching performances. Depending on the process, hump effect may change the MOS characteristics for negative Bulk-Source Voltage (VBS) and have a slight impact for V BS =0V. To model the hump effect, two narrow parasitic MOS are introduced in parallel with the main device. To accurately simulate matching degradation in sub-threshold mode, these parasitic transistors, in case of hump effect, have to be considered.

23 citations


Journal ArticleDOI
TL;DR: This study presents how one transistor built on thin film can be considered for volatile and non volatile memory applications, and electrically evaluated on thin silicon film technologies following CMOS evolution.

3 citations