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Showing papers by "Jean-Michel Portal published in 2015"


Proceedings ArticleDOI
07 Dec 2015
TL;DR: In this article, a 3D RRAM based neural networks were also proposed to emulate the potentiation and depression of a synapse, but more complex circuits were not discussed, using planar devices.
Abstract: Combining Resistive RAM concept with Vertical NAND technology and design, Vertical RRAM (VRRAM) was recently proposed as a cost-effective and extensible technology for future mass data storage applications [1]. 3D RRAM based neural networks were also proposed to emulate the potentiation and depression of a synapse [2], but more complex circuits were not discussed. In previous works [3-4], various RRAM based neuromorphic circuits were proposed and investigated, using planar devices.

36 citations


Journal ArticleDOI
TL;DR: In this paper, a built-in structure allows collecting statistical data related to the OxRRAM memory array (ON/OFF resistance distributions) for reliability assessment of the technology, which is a key parameter to determine the overall performance.
Abstract: Resistive Random Access Memory (RRAM) is a form of nonvolatile storage that operates by changing the resistance of a specially formulated solid dielectric material [1] . Among RRAMs, oxide-based Resistive RAMs (so-called OxRRAMs) are promising candidates due their compatibility with CMOS processes and high ON/OFF resistance ratio. Common problems with OxRRAM are related to high variability in operating conditions and low yield. OxRRAM variability mainly impact ON/OFF resistance ratio. This ratio is a key parameter to determine the overall performance of an OxRRAM memory. In this context, the presented built-in structure allows collecting statistical data related to the OxRRAM memory array (ON/OFF resistance distributions) for reliability assessment of the technology.

6 citations


Journal ArticleDOI
TL;DR: In this article, a ring-oscillator is used to measure the electrical value of capacitors embedded in a circuit using a calibration system to ensure the robustness of the measurement process against temperature, power supply and process variations.
Abstract: A direct way to measure the electrical value of capacitors embedded in a circuit using a ring-oscillator is presented. A calibration system ensures the robustness of the measurement process against temperature, power supply and process variations. Silicon results show the ability of the system to measure robustly a large range of small capacitors. The system also provides a noise immunity as the system provides a digital signature of the capacitor value.

4 citations


Patent
23 Jul 2015
TL;DR: A nonvolatile memory including a plurality of elementary cells, each cell including a first programmable-resistance storage element connected between first and second nodes of the cell, a first access transistor coupling the second node to a third node of cell, and a second access transistor coupled the second vertex to a fourth vertex of cell as discussed by the authors.
Abstract: A non-volatile memory including a plurality of elementary cells, each cell including: a first programmable-resistance storage element connected between first and second nodes of the cell; a first access transistor coupling the second node to a third node of the cell; and a second access transistor coupling the second node to a fourth node of the cell.

1 citations


Patent
23 Jul 2015
TL;DR: A nonvolatile memory including a plurality of elementary cells, each cell including a first programmable-resistance storage element connected between first and second nodes of the cell, a first access transistor coupling the second node to a third node of cell, and a second access transistor coupled the second vertex to a fourth vertex of cell as mentioned in this paper.
Abstract: A non-volatile memory including a plurality of elementary cells, each cell including: a first programmable-resistance storage element connected between first and second nodes of the cell; a first access transistor coupling the second node to a third node of the cell; and a second access transistor coupling the second node to a fourth node of the cell.

1 citations


Journal ArticleDOI
TL;DR: A multiplexed system able to select a single transistor among others in a small array is used, which guarantees a similar environment for all transistors in the array, while requiring a small number of pads for measurement.