An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Here we show through an order-of-magnitude analysis that the enhancement in the effective thermal conductivity of nanofluids is due mainly to the localized convection caused by the Brownian movement of the nanoparticles. We also introduce a convective-conductive model which accurately captures the effects of particle size, choice of base liquid, thermal interfacial resistance between the particles and liquid, temperature, etc. This model is a combination of the Maxwell-Garnett (MG) conduction model and the convection caused by the Brownian movement of the nanoparficles, and reduces to the MG model for large particle sizes. The model is in good agreement with data on water, ethylene glycol, and oil-based nanofluids, and shows that the lighter the nanoparticles, the greater the convection effect in the liquid, regardless of the thermal conductivity of the nanoparticles.

Brownian-motion-based convective-conductive model for the effective thermal conductivity of nanofluids

The purpose of this literature review is to compare different cooling technologies currently in development in research laboratories that are competing to solve the challenge of cooling the next generation of high heat flux computer chips. Today, most development efforts are focused on three technologies: liquid cooling in copper or silicon micro-geometry heat dissipation elements, impingement of liquid jets directly on the silicon surface of the chip, and two-phase flow boiling in copper heat dissipation elements or plates with numerous microchannels. The principal challenge is to dissipate the high heat fluxes (current objective is 300 W/cm2) while maintaining the chip temperature below the targeted temperature of 85°C, while of second importance is how to predict the heat transfer coefficients and pressure drops of the cooling process. In this study, the state of the art of these three technologies from recent experimental articles (since 2003) is analyzed and a comparison of the respective merits and ...

State of the Art of High Heat Flux Cooling Technologies

Continued miniaturization and demand for high-end performance of electronic devices and appliances have led to dramatic increase in their heat flux generation. Consequently, conventional coolants and cooling approaches are increasingly falling short in meeting the ever-increasing cooling needs and challenges of those high heat generating electronic devices. This study provides a critical review of traditional and emerging cooling methods as well as coolants for electronics. In addition to summarizing traditional coolants, heat transfer properties and performances of potential new coolants such as nanofluids are also reviewed and analyzed. With superior thermal properties and numerous benefits nanofluids show great promises in fulfilling the cooling demands of high heat generating electronic devices. It is believed that applications of such novel coolants in emerging techniques like micro-channels and micro-heat pipes can revolutionize cooling technologies for electronics in the future.

A critical review of traditional and emerging techniques and fluids for electronics cooling

Thermal management is one of the main challenges for the future of electronics1–5. With the ever-increasing rate of data generation and communication, as well as the constant push to reduce the size and costs of industrial converter systems, the power density of electronics has risen6. Consequently, cooling, with its enormous energy and water consumption, has an increasingly large environmental impact7,8, and new technologies are needed to extract the heat in a more sustainable way—that is, requiring less water and energy9. Embedding liquid cooling directly inside the chip is a promising approach for more efficient thermal management5,10,11. However, even in state-of-the-art approaches, the electronics and cooling are treated separately, leaving the full energy-saving potential of embedded cooling untapped. Here we show that by co-designing microfluidics and electronics within the same semiconductor substrate we can produce a monolithically integrated manifold microchannel cooling structure with efficiency beyond what is currently available. Our results show that heat fluxes exceeding 1.7 kilowatts per square centimetre can be extracted using only 0.57 watts per square centimetre of pumping power. We observed an unprecedented coefficient of performance (exceeding 10,000) for single-phase water-cooling of heat fluxes exceeding 1 kilowatt per square centimetre, corresponding to a 50-fold increase compared to straight microchannels, as well as a very high average Nusselt number of 16. The proposed cooling technology should enable further miniaturization of electronics, potentially extending Moore’s law and greatly reducing the energy consumption in cooling of electronics. Furthermore, by removing the need for large external heat sinks, this approach should enable the realization of very compact power converters integrated on a single chip. Cooling efficiency is greatly increased by directly embedding liquid cooling into electronic chips, using microfluidics-based heat sinks that are designed in conjunction with the electronics within the same semiconductor substrate.

/pdf/co-designing-electronics-with-microfluidics-for-more-5aa1udo1ts.pdf

Co-designing electronics with microfluidics for more sustainable cooling.

This paper describes a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors. Through the use of multiple heat exchanger zones and optimized cooler fin designs, a unit thermal resistance 10.5 C-mm2 /W from the cooler surface to the inlet water was demonstrated with a fluid pressure drop of <35kPa. Further, cooling of a thermal test chip with a microchannel cooler bonded to it packaged in a single chip module was also demonstrated for a chip power density greater than 300W/cm2. Coolers of this design should be able to cool chips with average power densities of 400W/cm2 or more

A Practical Implementation of Silicon Microchannel Coolers for High Power Chips

The paper describes a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors. Through the use of multiple heat exchanger zones and optimized cooler fin designs, a unit thermal resistance of 10.5 C-mm/sup 2//W from the cooler surface to the inlet water was demonstrated with a fluid pressure drop of less than 35 kPa. Further, cooling of a thermal test chip with a microchannel cooler bonded to it packaged in a single chip module was also demonstrated for a chip power density greater than 300 W/cm/sup 2/. Coolers of this design should be able to cool chips with average power densities of 400 W/cm/sup 2/ or more.

A practical implementation of silicon microchannel coolers for high power chips

The present invention relates generally to apparatus and methods for cooling semiconductor integrated circuit (IC) chip package structures. More specifically, the present invention relates to apparatus and methods for thermally coupling semiconductor chips to a heat conducting device (e.g., copper thermal hat or lid) using a compliant thermally conductive material (e.g., thermal paste), wherein a thermal interface is designed to prevent/inhibit the formation of voids in the compliant thermally conductive material due to the flow of such material in and out from between the chips and the heat conducting device due to thermal cycling.

Apparatus and Methods for Cooling Semiconductor Integrated Circuit Package Structures

The present invention relates generally to a new apparatus and method for a chip carrier. More particularly, the invention encompasses an apparatus and a method that uses a chip carrier having a single encapsulant to provide both flip chip fatigue life enhancement and environmental protection. A double-sided, pressure-sensitive, thermally-conductive adhesive tape could also be used with the encapsulated chip to directly attach the chip to a heat sink. Similarly, also disclosed is a method and apparatus for directly joining a heat sink to the chip carrier.

Method for forming chip carrier with a single protective encapsulant

Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.

Jeffrey A. Zitz

Papers

A Practical Implementation of Silicon Microchannel Coolers for High Power Chips

A practical implementation of silicon microchannel coolers for high power chips

Apparatus and Methods for Cooling Semiconductor Integrated Circuit Package Structures

Method for forming chip carrier with a single protective encapsulant

EMI shielding for semiconductor chip carriers