This invention generally relates to power semiconductor devices, and in particular to improved thyristor devices and circuits. The techniques we describe are particularly useful for so-called MOS-gated thyristors. We describe a thyristor comprising a plurality of power thyristor devices connected in parallel, each said thyristor device being operable at a device current which the device has an on-resistance with a positive temperature coefficient.

Power Semiconductor Devices

Semiconductor Power Devices

AlGaN-GaN power high-electron mobility transistors (HEMTs) with 600-V breakdown voltage are fabricated and demonstrated as switching power devices for motor drive and power supply applications. The fabricated power HEMT realized the high breakdown voltage by optimized field plate technique and the low on-state resistance of 3.3 m/spl Omega/cm/sup 2/, which is 20 times lower than that or silicon MOSFETs, thanks to the high critical field of GaN material and the high mobility in 2DEG channel. The fabricated devices also demonstrated the high current density switching of 850 A/cm/sup 2/ turn-off. These results show that AlGaN-GaN power-HEMTs are one of the most promising candidates for future switching power device for power electronics applications.

High breakdown voltage AlGaN-GaN power-HEMT design and high current density switching behavior

High-power device technology is a key technological factor for wireless communication, which is one of the information network infrastructures in the 21st century, as well as power electronics innovation, which contributes considerably to solving the energy saving problem in the future energy network. Widegap semiconductors, such as SiC and GaN, are strongly expected as high-power high-frequency devices and high-power switching devices owing to their material properties. In this paper, the present status and future prospect of these widegap semiconductor high-power devices are reviewed, in the context of applications in wireless communication and power electronics.

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Present Status and Future Prospect of Widegap Semiconductor High-Power Devices

Recently, a new technology for high voltage power MOSFETs has been introduced: the CoolMOS/sup TM/. Based on the new device concept of charge compensation, the R/sub DS(on)/ area product for e.g. 600 V transistors has been reduced by a factor of 5. The devices show no bipolar current contribution like the well known tail current observed during the turn-off phase of IGBTs. CoolMOS/sup TM/ virtually combines the low switching losses of a MOSFET with the on-state losses of an IGBT. Furthermore, the dependence of R/sub DS(on)/ on the breakdown voltage has been redefined. The more than square-law dependence in the case of standard MOSFET has been broken and a linear voltage dependence achieved. This opens the way to new fields of application even without avalanche operation. System miniaturization, higher switching frequencies, lower circuit parasitics, higher efficiency, and reduced system costs are pointing the way towards future developments. Not only has the new technology achieved breakthrough at reduced R/sub DS(on)/ values, but new benchmarks have also been set for the device capacitances. Due to chip shrinkage and a novel internal structure, the technology shows both a very small input capacitance and a strongly nonlinear output capacitance. The drastically lower gate charge facilitates and reduces the cost of controllability, and the smaller feedback capacitance reduces the dynamic losses. With this new technology, the minimum R/sub DS(on)/ values in all packages are being redefined in the important 600-1000 V categories.

COOLMOS/sup TM/-a new milestone in high voltage power MOS

For the first time a new device concept for high voltage power devices has been realized in silicon. Our 600 V-COOLMOS/sup TM/ reaches an area specific on-resistance of typically 3.5 /spl Omega//spl middot/mm/sup 2/. Our technology thus offers a shrink factor of 5 versus the actual state of the art in power MOSFETs. The device concept is based on charge compensation in the drift region of the transistor. We increase the doping of the vertical drift region roughly by one order of magnitude and counterbalance this additional charge by the implementation of fine structured columns of the opposite doping type. The blocking voltage of the transistor remains thus unaltered. The charge compensating columns do not contribute to the current conduction during the turn-on state. Nevertheless the drastically increased doping of the drift region allows the above mentioned reduction of the on-resistance.

A new generation of high voltage MOSFETs breaks the limit line of silicon

The SIPMOS (Siemens Power MOS) technology was developed for power MOSFETs as well as a. c. power switches in which MOS technology is functionally combined with bipolar devices. This technology which has process steps like those of conventional integrated MOS circuits was used to realize a FET-controlled thyristor. The SIPMOS thyristor shows excellent qualities with regard to on-state current (di/dt=4000 A/us) voltage immunity (dV/dt > 1200 V/us), and firing sensitivity.

A FET-controlled thyristor in SIPMOS technology

Controlled semiconductor switch with a semiconductor body containing a thyristor structure having a first zone of first conductivity type embedded in coplanar relationship in a second zone of second conductivity type; also containing a third zone of the first conductivity type and a fourth zone of the second conductivity type; and further containing an MIS-FET integrated into the semiconductor body and having a source zone of the first conductivity type embedded in coplanar relationship in a zone of the second conductivity type; an insulating layer disposed on the surface of the semiconductor body, a control electrode lying on the insulating layer and covering a first channel zone operatively associated with the FET; and a cathode electrode on the semiconductor body, including the features that the zone of the second conductivity type of the MIS-FET is embedded in the third zone in coplanar relationship therewith and forms the first channel zone at the surface of the semiconductor body; the second zone of the thyristor structure is embedded in the third zone in coplanar relationship therewith and forms a second channel zone at the surface of the semiconductor body; the third zone extends to the surface of the semiconductor body between the two channel zones; the control electrode also covers the second channel zone and the part of the third zone extending to the surface of the semiconductor body; and the cathode electrode is in contact with the source zone of the MIS-FET.

FET Controlled thyristor

1. A semiconductor arrangement comprising a substrate (1) of the first conductivity type, a plurality of cells, each having a first zone (3) of the second conductivity type which is embedded in planar fashion in the substrate (1), and each having a second zone (4) of the first conductivity type which is embedded in planar fashion in the first zone (3), wherein, in the first zone (3) at the substrate surface, there is arranged a channel zone (5) which connects the substrate (1) and the second zone (4), and an insulating layer (6) arranged on the substrate surface and on which there is arranged a control electrode (7, 12) which covers at least the channel zone (5), characterized in that, between the first zone (3) of those cells which are adjacent to the edge of the semiconductor arrangement and the edge of the semiconductor arrangement, there is arranged at least one auxiliary electrode (8, 12, 13, 5) which is insulated from the substrate surface ; that the auxiliary electrode (8, 12, 13, 15) has a plurality of sections ; and that the section which is arranged closer to the edge of the semiconductor arrangement is spaced at a greater distance from the surface of the substrate than is the section which is arranged closer to the first zone (3).

Planar semiconductor with increased breakdown voltage

Light-controlled thyristor, including a semiconductor body having a surface, a first zone being of a given conduction type and having a given depth and being adjacent to the surface of the body, a second zone of the given conduction type having a region intended for exposure, a third zone of a conduction type opposite to the given type being disposed under the first and second zones and having a part thereof emerging to the surface of the body between the first and second zones and having a depression formed therein containing the region intended for exposure, electrodes contacting the first and second zones, said second zone having a first and a second subzone, the first subzone having the given depth and being disposed between the part of the third zone emerging to the surface of the body and the depression, the first subzone being in contact with one of the electrodes, the second subzone being the region intended for exposure in the depression and being formed by implanted ions, the second subzone being disposed parallel to the surface of the body and being electrically connected to the first subzone.

Jens Peer Ing Grad Stengl

Papers

A new generation of high voltage MOSFETs breaks the limit line of silicon

A FET-controlled thyristor in SIPMOS technology

FET Controlled thyristor

Planar semiconductor with increased breakdown voltage

Method of fabricating light-controlled thyristor utilizing selective etching and ion-implantation