A survey of Gallium Nitride HEMT for RF and high power applications

Two-dimensional (2D) materials have attracted extensive interest due to their excellent electrical, thermal, mechanical, and optical properties. Graphene has been one of the most explored 2D materials. However, its zero band gap has limited its applications in electronic devices. Transition metal dichalcogenide (TMDC), another kind of 2D material, has a nonzero direct band gap (same charge carrier momentum in valence and conduction band) at monolayer state, promising for the efficient switching devices (e.g., field-effect transistors). This review mainly focuses on the recent advances in charge carrier mobility and the challenges to achieve high mobility in the electronic devices based on 2D-TMDC materials and also includes an introduction of 2D materials along with the synthesis techniques. Finally, this review describes the possible methodology and future prospective to enhance the charge carrier mobility for electronic devices.

https://link.springer.com/content/pdf/10.1007%2Fs40820-017-0152-6.pdf

Two-Dimensional Transition Metal Dichalcogenides and Their Charge Carrier Mobilities in Field-Effect Transistors

In this letter, we report a detailed experimental investigation of the time-dependent breakdown induced by forward gate stress in GaN-based power HEMTs with a p-type gate, controlled by a Schottky metal/p-GaN junction. When a high stress voltage is applied on the gate, a large voltage drop and an electric field occur in the depletion region of the p-GaN close to the metal interface, promoting the formation of a percolation path. We have investigated the mechanisms underlying the gate breakdown by adopting different stress conditions, analyzing the influence of the temperature, and investigating the activation energy of the traps. In addition, thanks to this approach, the device lifetime has been evaluated and an original empirical model, representing the relationship between the gate leakage current and the time to failure, has been proposed.

Investigation of the p-GaN Gate Breakdown in Forward-Biased GaN-Based Power HEMTs

We present a physics-based compact model for two-dimensional (2D) field-effect transistors (FETs) based on monolayer semiconductors such as MoS2 A semi-classical transport approach is appropriate for the 2D channel, enabling simplified analytical expressions for the drain current In addition to intrinsic FET behavior, the model includes contact resistance, traps and impurities, quantum capacitance, fringing fields, high-field velocity saturation, and self-heating, the latter being found to play an important role The model is calibrated with state-of-the-art experimental data for n- and p-type 2D-FETs, and it can be used to analyze device properties for sub-100 nm gate lengths Using the experimental fit, we demonstrate the feasibility of circuit simulations using properly scaled devices The complete model is implemented in SPICE-compatible Verilog-A, and a downloadable version is freely available at the nanoHUBorg

S2DS: Physics-based compact model for circuit simulation of two-dimensional semiconductor devices including non-idealities

This paper investigates the reliability of PIN-gate-all-around (GAA)-tunnel field-effect transistor (TFET) with N+ source pocket. The reliability of the PNIN-GAA-TFET is examined by analyzing: 1) the impact of interface trap charge (ITC) density and polarity and 2) the temperature affectability on analog/RF performance of the device. It is realized that the interface traps existing at the Si/SiO2 interface modifies the flatband voltage and, thereby, alters the analog and RF characteristics of the device. The analysis is done at various trap charge densities and polarities. The results, thus, obtained reveal that, at higher trap charge density, the device performance alters significantly. It is obtained that, for a donor trap charge density of $3 \times 10^{{12}}$ cm $^{-2}$ , the off-state current of the device degrades tremendously (increases from an order of $10^{-17}$ – $10^{-9}\text{A}$ ). The temperature affectability over the device reveals that, at lower gate bias, the Shockley–Read–Hall phenomenon dominates and degrades the subthreshold current of the device at elevated temperatures. However, for the superthreshold regime, the band-to-band tunneling (BTBT) mechanism dominates. Furthermore, the results show enormous degradation in the off-state current at elevated temperatures, such that, with an increase in the ambient temperature from 200 K to 400 K, the $I_{ \mathrm{\scriptscriptstyle OFF}}$ degrades by an order of $10^{5}$ , i.e., increases from $10^{-18}$ A to $10^{-13}$ A. The results specify that the PNIN-GAA-TFET is insusceptible to the acceptor traps existing at the Si/SiO2 interface in comparison with the donor traps.

Numerical Simulation of N + Source Pocket PIN-GAA-Tunnel FET: Impact of Interface Trap Charges and Temperature

This paper investigates short-channel effects (SCEs) in double-gate tunnel FETs (TFETs) using an analytic model that includes depletion in the source. It is shown that the drain bias has a significant effect on the potential profile at the source when the channel length is reduced to below twice the scale length. The OFF-state current becomes a strong function of channel length. The subthreshold current slope is also degraded in short-channel TFETs to the extent that there is no region of <60 mV/decade below a minimum channel length. The SCE also manifests itself in the finite-output conductance in the saturation region—a Drain-Induced Barrier Lowering-like effect in conventional MOSFETs.

Short-Channel Effects in Tunnel FETs

This brief models the effect of lightly doped drain on the $I_{\mathrm { {ds}}}$ – $V_{\mathrm { {gs}}}$ and $I_{\mathrm { {ds}}}$ – $V_{\mathrm { {ds}}}$ characteristics of tunnel FETs. It is shown that an extended drain depletion region can greatly reduce both the off-current and the subthreshold swing with essentially no impact on the on-current. In particular, a lightly doped drain mitigates the undesirable ambipolar effect that cannot otherwise be relieved by lengthening the channel length. However, if the density of states is not sufficiently low, a low drain doping could result in a nondegenerate condition in which the tunneling window is blocked at $V_{\mathrm { {ds}}} = 0$ , degrading the linear region current.

Reduction of TFET OFF-Current and Subthreshold Swing by Lightly Doped Drain

This paper presents an analytic $I$ – $V$ model for short-channel MOSFETs made of 2-D semiconductor material. First, a subthreshold current model is formulated based on the solutions to 2-D Poisson’s equation with negligible mobile charge. Next, a velocity saturation model is developed under the framework of a drift and diffusion long-channel model. These two models are then unified into an all region, short-channel $I$ – $V$ model with both drain induced barrier lowering and velocity saturation effects. Ballistic currents, including the intraband tunneling and the above-the-barrier transport, have been examined and compared with the thermionic currents.

A Short-Channel $I$ – $V$ Model for 2-D MOSFETs

This paper presents an analytic model for double-gate tunnel FETs with an exponential barrier. By carrying out the Wentzel-Kramer–Brillouin integral in closed form, an $I$ – $V$ model is formulated in terms of a single integral of a continuous function with respect to energy. The model shows that source degeneracy helps the linear region $I_{\mathbf {ds}}$ – $V_{\mathbf {ds}}$ characteristics, but degrades the saturation current. Also investigated is the role of the effective density of states on the debiasing of $V_{\mathbf {gs}}$ due to channel inversion charge at low $V_{\mathbf {ds}}$ . A high effective density of states is shown to lead to superlinear $I_{\mathbf {ds}}$ – $V_{\mathbf {ds}}$ characteristics.

An Analytic Model for Heterojunction Tunnel FETs With Exponential Barrier

The effect of source doping on tunnel FET (TFET) currents is investigated analytically for the case of an exponential barrier Source depletion is coupled to the channel potential profile through the continuity of field at the junction edge Closed form WKB (Wentzel-Kramers-Brillouin) integral are carried out by considering mixed electron and hole tunneling in heterojunction TFETs with a staggered bandgap It is shown that there is an optimum source doping that maximizes the TFET current A certain degree of source depletion actually helps because it lets low-barrier hole tunneling in the source to make up part of the tunneling path

Jianzhi Wu

Papers

Short-Channel Effects in Tunnel FETs

Reduction of TFET OFF-Current and Subthreshold Swing by Lightly Doped Drain

A Short-Channel $I$ – $V$ Model for 2-D MOSFETs

An Analytic Model for Heterojunction Tunnel FETs With Exponential Barrier

Analysis of Source Doping Effect in Tunnel FETs With Staggered Bandgap