Jin Wei

Bio: Jin Wei is an academic researcher from Hong Kong University of Science and Technology. The author has contributed to research in topics: High-electron-mobility transistor & Threshold voltage. The author has an hindex of 20, co-authored 116 publications receiving 1376 citations. Previous affiliations of Jin Wei include University of Electronic Science and Technology of China & Shenzhen University.

Maximizing the Performance of 650-V p-GaN Gate HEMTs: Dynamic RON Characterization and Circuit Design Considerations

Abstract: The systematic characterization of a 650-V/13-A enhancement-mode GaN power transistor with p-GaN gate is presented. Critical device parameters such as ON-resistance $R_{{\rm{ON}}}$ and threshold voltage $V_{{\rm{TH}}}$ are evaluated under both static and dynamic (i.e., switching) operating conditions. The dynamic R ON is found to exhibit different dependence on the gate drive voltage $V_{{\rm{GS}}}$ from the static $R_{{\rm{ON}}}$ . While reasonably suppressed at higher $V_{{\rm{GS}}}$ of 5 and 6 V, the degradation in dynamic R ON is significantly larger at lower $V_{{\rm{GS}}}$ of 3–4 V, which is attributed to the positive shift in $V_{{\rm{TH}}}$ under switching operations. In addition to characterization of discrete devices, a custom-designed double-pulse test circuit with 400-V, 10-A test capability is built to evaluate the transient switching performance of the p-GaN gate power transistors. Optimal gate drive conditions are proposed to: 1) provide sufficient gate over-drive to minimize the impact of the $V_{{\rm{TH}}}$ shift on the dynamic $R_{{\rm{ON}}}$ ; and 2) leave enough headroom to save the device from excessive gate stresses. Moreover, gate drive circuit design and board layout considerations are also discussed by taking into account the fast switching characteristics of GaN devices.

Charge Storage Mechanism of Drain Induced Dynamic Threshold Voltage Shift in ${p}$ -GaN Gate HEMTs

Abstract: The drain induced dynamic threshold voltage ( ${V}_{\textrm {th}}$ ) shift of a ${p}$ -GaN gate HEMT with a Schottky gate contact is investigated, and the underlying mechanisms are explained with a charge storage model. When the device experiences a high drain bias ${V}_{\textrm {DSQ}}$ , the gate-to-drain capacitance ( ${C}_{\textrm {GD}}$ ) is charged to ${Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSQ}}$ ). As the drain voltage drops to ${V}_{\textrm {DSM}}$ where ${V}_{\textrm {th}}$ is measured, ${C}_{\textrm {GD}}$ is expected to be discharged to ${Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSM}}$ ). However, the metal/ ${p}$ -GaN Schottky junction could block the discharging current, resulting in storage of negative charges in the ${p}$ -GaN layer. For the device to turn on, additional gate voltage is required to counteract the stored negative charges, resulting in a positive shift of ${V}_{\textrm {th}}$ . The dynamic ${V}_{\textrm {th}}$ shift is an intrinsic and predictable characteristic of the ${p}$ -GaN gate HEMT which is linearly correlated with $\Delta \!{Q}_{\textrm {GD}}={Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSQ}}$ ) $- {Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSM}}$ ). The ${V}_{\textrm {th}}$ shift is dependent on ${V}_{\textrm {DSQ}}$ as well as ${V}_{\textrm {DSM}}$ , indicating that the ${V}_{\textrm {th}}$ shift is varying along the load line during a switching operation.

Integration of LPCVD-SiN x gate dielectric with recessed-gate E-mode GaN MIS-FETs: Toward high performance, high stability and long TDDB lifetime

Abstract: By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiN x gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode (V th ∼ +2.37 V @ I d = 100 μA/mm) GaN MIS-FETs with high stability and high reliability. The LPCVD-SiN x /GaN MIS-FET delivers remarkable advantages in high Vth thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI).

Gallium nitride-based complementary logic integrated circuits

Abstract: Owing to its energy efficiency, silicon complementary metal–oxide–semiconductor (CMOS) technology is the current driving force of the integrated circuit industry. Silicon’s narrow bandgap has led to the advancement of wide-bandgap semiconductor materials, such as gallium nitride (GaN), being favoured in power electronics, radiofrequency power amplifiers and harsh environment applications. However, the development of GaN CMOS logic circuits has proved challenging because of the lack of a suitable strategy for integrating n-channel and p-channel field-effect transistors on a single substrate. Here we report the monolithic integration of enhancement-mode n-channel and p-channel GaN field-effect transistors and the fabrication of GaN-based complementary logic integrated circuits. We construct a family of elementary logic gates—including NOT, NAND, NOR and transmission gates—and show that the inverters exhibit rail-to-rail operation, suppressed static power dissipation, high thermal stability and large noise margins. We also demonstrate latch cells and ring oscillators comprising cascading logic inverters. Through the monolithic integration of enhancement-mode n-type and p-type gallium nitride field-effect transistors, complementary integrated circuits including latch circuits and ring oscillators can be created for use in high-power and high-frequency applications.

Frequency- and Temperature-Dependent Gate Reliability of Schottky-Type ${p}$ -GaN Gate HEMTs

Abstract: In this paper, we carried out a systematic investigation on gate degradation and the physical mechanism of the Schottky-type ${p}$ -GaN gate HEMTs under positive gate voltage stress. The frequency- and temperature-dependent measurements have been conducted. It is found that the time-dependent gate degradation exhibits weak relevance with frequencies ranging from 10 to 100 kHz under dynamic gate stress and is similar to that in static gate stress. Both the gate breakdown voltage (BV) and mean-time-to-failure (MTTF) show positive temperature dependence. Moreover, the current–voltage ( I–V ) characteristics and threshold voltage ( ${V}_{\text {TH}}$ ) instability of ${p}$ -GaN devices before/after gate degradation are compared and analyzed. The degraded Schottky junction exhibits an ohmic-like gate behavior. It is revealed that under a large gate bias stress, high-energy electrons accelerated in the depletion region of the ${p}$ -GaN layer would promote the formation of defect levels near the metal/ ${p}$ -GaN interface, leading to the initial ${p}$ -GaN layer degradation. The subsequent high gate leakage density could cause the final degradation of the AlGaN barrier.

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

GaN-on-Si Power Technology: Devices and Applications

Abstract: In this paper, we present a comprehensive reviewand discussion of the state-of-the-art device technology and application development of GaN-on-Si power electronics. Several device technologies for realizing normally off operation that is highly desirable for power switching applications are presented. In addition, the examples of circuit applications that can greatly benefit from the superior performance of GaN power devices are demonstrated. Comparisonwith other competingpower device technology, such as Si superjunction-MOSFET and SiC MOSFET, is also presented and analyzed. Critical issues for commercialization of GaN-on-Si power devices are discussed with regard to cost, reliability, and ease of use.

The 2018 GaN power electronics roadmap

Abstract: Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.

Wide Bandgap Devices in AC Electric Drives: Opportunities and Challenges

Abstract: Wide bandgap (WBG) device-based power electronics converters are more efficient and lightweight than silicon-based converters. WBG devices are an enabling technology for many motor drive applications and new classes of compact and efficient motors. This paper reviews the potential applications and advances enabled by WBG devices in ac motor drives. Industrial motor drive products using WBG devices are reviewed, and the benefits are highlighted. This paper also discusses the technical challenges, converter design considerations, and design tradeoffs in realizing the full potential of WBG devices in motor drives. There is a tradeoff between high switching frequency and other issues such as high dv/dt and electromagnetic interference. The problems of high common mode currents and bearing and insulation damage, which are caused by high dv/dt , and the reliability of WBG devices are discussed.

Power Semiconductor Devices for Smart Grid and Renewable Energy Systems

Abstract: Modern civilization is related to the increased use of electric energy for industry production, human mobility, and comfortable living. Highly efficient and reliable power electronic systems, which convert and process electric energy from one form to the other, are critical for smart grid and renewable energy systems. The power semiconductor device, as the cornerstone technology in a power electronics system, plays a pivotal role in determining the system efficiency, size, and cost. Starting from the invention and commercialization of silicon bipolar junction transistor 60 years ago, a whole array of silicon power semiconductor devices have been developed and commercialized. These devices enable power electronics systems to reach ultrahigh efficiency and high-power capacity needed for various smart grid and renewable energy system applications such as photovoltaic (PV), wind, energy storage, electric vehicle (EV), flexible ac transmission system (FACTS), and high voltage dc (HVDC) transmission. In the last two decades, newer generations of power semiconductor devices based on wide bandgap (WBG) materials, such as SiC and GaN, were developed and commercialized further pushing the boundary of power semiconductor devices to higher voltages, higher frequencies, and higher temperatures. This paper reviews some of the major power semiconductor devices technologies and their potential impacts and roadmaps.