J
Jishen Zhao
Researcher at University of California, San Diego
Publications - 101
Citations - 4572
Jishen Zhao is an academic researcher from University of California, San Diego. The author has contributed to research in topics: Cache & Non-volatile memory. The author has an hindex of 24, co-authored 95 publications receiving 3255 citations. Previous affiliations of Jishen Zhao include Pennsylvania State University & Hewlett-Packard.
Papers
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Journal ArticleDOI
PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory
TL;DR: This work proposes a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory, and distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving.
Proceedings ArticleDOI
Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories
TL;DR: This work proposes Pinatubo, a Processing In Non-volatile memory ArchiTecture for bUlk Bitwise Operations, which redesigns the read circuitry so that it can compute the bitwise logic of two or more memory rows very efficiently, and support one-step multi-row operations.
Posted Content
Basic Performance Measurements of the Intel Optane DC Persistent Memory Module
Joseph Izraelevitz,Jian Yang,Lu Zhang,Juno Kim,Xiao Liu,Amirsaman Memaripour,Yun Joon Soh,Zixuan Wang,Yi Xu,Subramanya R. Dulloor,Jishen Zhao,Steven Swanson +11 more
TL;DR: This work comprises the first in-depth, scholarly, performance review of Intel's Optane DC PMM, exploring its capabilities as a main memory device, and as persistent, byte-addressable memory exposed to user-space applications.
Proceedings ArticleDOI
DeepInspect: A Black-box Trojan Detection and Mitigation Framework for Deep Neural Networks
TL;DR: This work proposes DeepInspect, the first black-box Trojan detection solution with minimal prior knowledge of the model, which learns the probability distribution of potential triggers from the queried model using a conditional generative model and retrieves the footprint of backdoor insertion.
Proceedings ArticleDOI
Kiln: closing the performance gap between systems with and without persistence support
TL;DR: Kiln is a persistent memory design that adopts a nonvolatile cache and aNonvolatile main memory to enable atomic in-place updates without logging or copy-on-write and can achieve 2× performance improvement compared with NVRAM-based persistent memory with write-ahead logging.