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Jose Miguel Rocha-Perez

Researcher at National Institute of Astrophysics, Optics and Electronics

Publications -  40
Citations -  304

Jose Miguel Rocha-Perez is an academic researcher from National Institute of Astrophysics, Optics and Electronics. The author has contributed to research in topics: CMOS & Amplifier. The author has an hindex of 6, co-authored 34 publications receiving 262 citations. Previous affiliations of Jose Miguel Rocha-Perez include Texas A&M University & Benemérita Universidad Autónoma de Puebla.

Papers
More filters
Journal ArticleDOI

A 60-mW 200-MHz continuous-time seventh-order linear phase filter with on-chip automatic tuning system

TL;DR: In this paper, a full CMOS seventh-order linear phase filter based on g/sub m/-C biquads with a -3dB frequency of 200 MHz is realized in 0.35/spl mu/m CMOS process.
Journal ArticleDOI

Integrated circuit generating 3- and 5-scroll attractors

TL;DR: Experimental realization of the first integrated circuit of a multi-scroll continuous chaotic oscillator showing 3- and 5-scroll attractors is introduced, based on a variant of the Chua’s system.
Journal ArticleDOI

Pseudo-Three-Stage Miller Op-Amp With Enhanced Small-Signal and Large-Signal Performance

TL;DR: A simple technique to implement highly power efficient class AB–AB Miller op-amps using a composite input stage with resistive local common mode feedback that essentially enhances the op-amp’s effective transconductance gain, the dc open-loopgain, the gain-bandwidth product, and slew rate with just moderate increase in power dissipation.
Journal ArticleDOI

A compact four quadrant CMOS analog multiplier

TL;DR: In this paper, the design of a very compact four quadrant CMOS analog multiplier is presented, consisting of only four transistors and ten resistors, enabling a very small silicon area consumption.
Journal ArticleDOI

A 0.18 μm CMOS capacitor-less Low-Drop Out Voltage Regulator Compensated via the Bootstrap Flipped-Voltage Follower

TL;DR: A Cap-less Low-Drop Out (LDO) Voltage Regulator that uses a Bootstrap Flipped-Voltage Follower (B-FVF) as the input stage of its active compensation network that allows the integration of a smaller Cf, a 10X reduction compared with the state-of-the-art, and easier placement of the high-pass pole to higher frequencies than the LDO open-loop Gain Bandwidth (GBW).