Jose Silva-Martinez

Bio: Jose Silva-Martinez is an academic researcher from Texas A&M University. The author has contributed to research in topics: CMOS & Amplifier. The author has an hindex of 46, co-authored 282 publications receiving 7387 citations. Previous affiliations of Jose Silva-Martinez include Katholieke Universiteit Leuven & Texas A&M University System.

Full On-Chip CMOS Low-Dropout Voltage Regulator

Abstract: This paper proposes a solution to the present bulky external capacitor low-dropout (LDO) voltage regulators with an external capacitorless LDO architecture. The large external capacitor used in typical LDOs is removed allowing for greater power system integration for system-on-chip (SoC) applications. A compensation scheme is presented that provides both a fast transient response and full range alternating current (AC) stability from 0- to 50-mA load current even if the output load is as high as 100 pF. The 2.8-V capacitorless LDO voltage regulator with a power supply of 3 V was fabricated in a commercial 0.35-mum CMOS technology, consuming only 65 muA of ground current with a dropout voltage of 200 mV. Experimental results demonstrate that the proposed capacitorless LDO architecture overcomes the typical load transient and ac stability issues encountered in previous architectures.

CMOS transconductance amplifiers, architectures and active filters: a tutorial

Abstract: An updated version of a 1985 tutorial paper on active filters using operational transconductance amplifiers (OTAs) is presented. The integrated circuit issues involved in active filters (using CMOS transconductance amplifiers) and the progress in this field in the last 15 years is addressed. CMOS transconductance amplifiers, nonlinearised and linearised, as well as frequency limitations and dynamic range considerations are reviewed. OTA-C filter architectures, current-mode filters, and other potential applications of transconductance amplifiers are discussed.

The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier

Abstract: A recycling amplifier architecture based on the folded cascode transconductance amplifier is described. The proposed amplifier delivers an appreciably enhanced performance over that of the conventional folded. This is achieved by using previously idle devices in the signal path, which results in an enhanced transconductance, gain, and slew rate. Moreover, the input referred noise and offset analyses are included to demonstrate that the proposed modifications have no adverse effects on these design metrics. Transistor-level simulations and experimental results in TSMC 0.18 mum CMOS process confirm the theoretical results. When compared to the conventional folded cascode, and for the same area and power budgets, the proposed amplifier has almost twice the bandwidth (134.2 MHz versus 70.7 MHz) and better than twice the slew rate (94.1 V/mus versus 42.1 V/mus) while driving the same 5.6 pF load. Also a gain enhancement of 7.6 dB is observed.

A frequency compensation scheme for LDO voltage regulators

Abstract: A stable low dropout (LDO) voltage regulator topology for low equivalent series resistance (ESR) capacitive loads is presented. The proposed scheme generates a zero internally instead of relying on the zero generated by the load capacitor and its ESR combination for stability. It is demonstrated that this scheme realizes robust frequency compensation, facilitates the use of multilayer ceramic capacitors for the load of LDO regulators, and improves transient response and noise performance. Test results from a prototype fabricated in AMI 0.5-/spl mu/m CMOS technology provide the most important parameters of the regulator viz., ground current, load regulation, line regulation, output noise, and start-up time.

A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors

Abstract: A multistage operational transconductance amplifier with a feedforward compensation scheme which does not use Miller capacitors is introduced. The compensation scheme uses the positive phase shift of left-half-plane (LHP) zeroes caused by the feedforward path to cancel the negative phase shift of poles to achieve a good phase margin. A two-stage path increases further the low frequency gain while a feedforward single-stage amplifier makes the circuit faster. The amplifier bandwidth is not compromised by the absence of the traditional pole-splitting effect of Miller compensation, resulting in a high-gain wideband amplifier. The capacitors of a capacitive amplifier using the proposed techniques can be varied more than a decade without significant settling time degradation. Experimental results for a prototype fabricated in an AMI 0.5-/spl mu/m CMOS process show DC gain of around 90 dB and a 1% settling time of 15 ns for a load capacitor of 12 pF. The power supply used is /spl plusmn/1.25 V.

Design Of Analog Cmos Integrated Circuits

Abstract: Thank you very much for downloading design of analog cmos integrated circuits. Maybe you have knowledge that, people have look hundreds times for their favorite novels like this design of analog cmos integrated circuits, but end up in malicious downloads. Rather than reading a good book with a cup of coffee in the afternoon, instead they cope with some malicious virus inside their laptop. design of analog cmos integrated circuits is available in our book collection an online access to it is set as public so you can download it instantly. Our digital library saves in multiple countries, allowing you to get the most less latency time to download any of our books like this one. Merely said, the design of analog cmos integrated circuits is universally compatible with any devices to read.

Detection, Estimation, and Modulation Theory

Abstract: electrical and computer engineering ece courses ece 257a multiuser communication systems 4 congestion control convex programming and dual controller fair end end rate allocation max min fair vs proportional, electrical systems engineering washington university arye nehorai eugene and martha lohman professor of electrical engineering phd stanford university signal processing imaging biomedicine communications, ieee transactions on aerospace and electronic systems ieee transactions on aerospace and electronic systems focuses on the organization design development integration and operation of complex systems for space air, department of electrical engineering and computer science h kumar wickramsinghe department chair 2213 engineering hall 949 824 4821 http www eng uci edu dept eecs overview electrical engineering and computer science is, download electrical and electronics engineering ebooks syst mes temps discret commande num rique des proc d s pdf 499 ko terminology and symbols in control engineering pdf 326 ko the best of thomas, publications stream wise list iit kanpur papers published in journals in 2016 dutta s patchaikani p k behera l near optimal controller for nonlinear continuous time systems with unknown dynamics, resolve a doi name type or paste a doi name into the text box click go your browser will take you to a web page url associated with that doi name send questions or comments to doi, peer reviewed journal ijera com international journal of engineering research and applications ijera is an open access online peer reviewed international journal that publishes research, dod sbir 2016 2 sbir gov note the solicitations and topics listed on this site are copies from the various sbir agency solicitations and are not necessarily the latest and most up, an english japanese dictionary of electrical engineering c 2952 9 691 c band c c contact c c maccs centre for mathematical modelling and computer simulation, the of and to a in that is was he for it with as his on be most common text click on the icon to return to www berro com and to enjoy and benefit the of and to a in that is was he for it with as his on be at by i this had

Low-IF topologies for high-performance analog front ends of fully integrated receivers

Abstract: When it comes to integratability, the zero-intermediate frequency (IF) receiver is an alternative for the heterodyne or IF receiver. In recent years, the zero-IF receiver has been introduced in several applications, but its performance cannot be compared to that of the IF receiver yet. This lower performance is closely related to its baseband operation, resulting in filter saturation and distortion, both caused by DC-offsets and self-mixing at the inputs of the mixers. The low-IF receiver has a topology which is closely related to the zero-IF receiver, but it does not operate in the baseband, only near the baseband. The consequences are that, as for the zero-IF receiver, the implementation of a low-IF receiver can be done with a high degree of integration, however, its performance can be better. In this paper, the fundamental principles of the low-IF receiver topology are introduced. Different low-IF receiver topologies are synthesized and fully analyzed in this paper. This is done by applying the complex signal technique-a technique used in digital applications to the study of analog receiver front ends.

Arctangent Demodulation With DC Offset Compensation in Quadrature Doppler Radar Receiver Systems

Abstract: Direct-conversion microwave Doppler radar can be used to detect cardiopulmonary activity at a distance. One challenge for such detection in single channel receivers is demodulation sensitivity to target position, which can be overcome by using a quadrature receiver. This paper presents a mathematical analysis and experimental results demonstrating the effectiveness of arctangent demodulation in quadrature receivers. A particular challenge in this technique is the presence of dc offset resulting from receiver imperfections and clutter reflections, in addition to dc information related to target position and associated phase. These dc components can be large compared to the ac motion-related signal, and thus, cannot simply be included in digitization without adversely affecting resolution. Presented here is a method for calibrating the dc offset while preserving the dc information and capturing the motion-related signal with maximum resolution. Experimental results demonstrate that arctangent demodulation with dc offset compensation results in a significant improvement in heart rate measurement accuracy over quadrature channel selection, with a standard deviation of less than 1 beat/min