A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.

Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication

There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.

Dense arrays and charge storage devices, and methods for making same

Combinations, called matrices with memories, of matrix materials that are encoded with an optically readable code are provided. The matrix materials are those that are used in as supports in solid phase chemical and biochemical syntheses, immunoassays and hybridization reactions. The matrix materials may additionally include fluophors or other luminescent moieties to produce luminescing matrices with memories. The memories include electronic and optical storage media and also include optical memories, such as bar codes and other machine-readable codes. By virtue of this combination, molecules and biological particles, such as phage and viral particles and cells, that are in proximity or in physical contact with the matrix combination can be labeled by programming the memory with identifying information and can be identified by retrieving the stored information. Combinations of matrix materials, memories, and linked molecules and biological materials are also provided. The combinations have a multiplicity of applications, including combinatorial chemistry, isolation and purification of target macromolecules, capture and detection of macromolecules for analytical purposes, selective removal of contaminants, enzymatic catalysis, cell sorting, drug delivery, chemical modification and other uses. Methods for tagging molecules, biological particles and matrix support materials, immunoassays, receptor binding assays, scintillation proximity assays, non-radioactive proximity assays, and other methods are also provided.

Matrices with memories and uses thereof

This paper describes the latest and most advanced surface-potential-based model jointly developed by The Pennsylvania State University and Philips. Specific topics include model structure, mobility and velocity saturation description, further development and verification of symmetric linearization method, recent advances in the computational techniques for the surface potential, modeling of gate tunneling current, inclusion of the retrograde impurity profile, and noise sources. The emphasis of this paper is on incorporating the recent advances in MOS device physics and modeling within the compact modeling context

PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

Combinations, called matrices with memories, of matrix materials with remotely addressable or remotely programmable recording devices that contain at least one data storage unit are provided. The matrix materials are those that are used in as supports in solid phase chemical and biochemical syntheses, immunoassays and hybridization reactions. The data storage units are preferably non-volatile antifuse memories. By virtue of this combination, molecules and biological particles, such as phage and viral particles and cells, that are in proximity or in physical contact with the matrix combination can be labeled by programming the memory with identifying information and can be identified by retrieving the stored information. Combinations of matrix materials, memories, and linked molecules and biological materials are also provided. The combinations have a multiplicity of applications, including combinatorial chemistry, isolation and purification of target macromolecules, capture and detection of macromolecules for analytical purposes, selective removal of contaminants, enzymatic catalysis, chemical modification and other uses.

Remotely programmable matrices with memories

A programmable storage element for redundancy-programming includes a programmable antifuse circuit, which includes a plurality of first resistors and a switching circuit for coupling the first resistors in series in response to a plurality of first control signals and for coupling the first resistors in parallel in response to a plurality of second control signals to permit programming of the first resistors, and a sensing circuit for determining whether or not the first resistors have been programmed. The state of the first resistors is determined by comparing a first voltage drop across the first resistors with a second voltage drop across a second resistor. Each of the first resistors is an unsilicided polysilicon conductor which has an irreversible resistance decrease when a predetermined threshold current is applied for a minimum period of time.

Low voltage programmable storage element

This paper describes a 22nm FDSOI technology optimized for RF/mmWave applications. The offering consists of high speed mmWave FET transistors, and a thick dual copper back-end. The offering is integrated with a low power digital technology (0.4V) and is extremely simple with less than 40 masks for an 8M process. The best performance for nFET/pFET f T is 347/275 GHz and for f MAX is 371/299 GHz. The RF cell layouts enable higher performance and improved wiring flexibility for the higher currents demanded in mmWave applications. The optimized pFET layout utilizes stress to increase performance while minimizing the parasitic capacitance. A strong pFET distinguishes this technology from many others enabling more efficient “complementary” RF/mmWave design. This combination of high performance mmWave FET transistors, low voltage logic, and low complexity mask build makes it ideal for a large suite of RF/mmWave application including IOT, 5G, and Radar

A 22nm FDSOI Technology Optimized for RF/mmWave Applications

The scaling of semiconductor technologies from 90- to 45-nm nodes highlights the need for accurate and predictive compact models that address the regime where small-scale physical effects become dominant. These demanding requirements on compact models extend beyond the core model to a suite of design tools that include extraction tools and statistical methods to account for unpredictable variation (e.g., random dopant fluctuations and polysilicon linewidth variation) and predictable variation (e.g., transistor response differences that are layout dependent). Layout-dependent or local environment differences are driven by factors such as lithography and novel performance-enhancing process techniques such as dual-stress nitride liner films. Sources of variation such as rapid thermal annealing temperature, low-frequency noise, and modeling of back-end-of-line elements need to be considered. The modeling of intradie and interdie variations, updated for small geometries, should be properly positioned in the design flow. This paper presents the challenges and results of compact modeling at the 65-nm node and beyond

Modeling of Variation in Submicrometer CMOS ULSI Technologies

This paper describes the features and performance of an analog and RF device technology development on a 14-nm logic FinFET platform. An optimized single-side gate contact RF device layout shows a ${F}_{t}/{F}_{\text {max}}$ of 314/180 GHz and 285/140 GHz for ${N}$ and PFinFET device, respectively. The double-side gate contact structure with contact on either end of active gate enhances the peak ${F}_{\text {max}}$ performance to 227 and 195 GHz for both ${N}$ and PFinFET devices, respectively. A significant boost in the PFinFET RF performance is observed compared to 28-nm planar PFET, which is attributed to the source/drain SiGe epitaxy stressor that results in higher hole carrier mobility. On the other hand, the thin channel body of FinFET structure facilitates a better electrostatic control of gate over the channel region and hence suppresses short channel effects including the drain-induced barrier lowering. Consequently, a significantly higher self-gain ( ${G}_{m}/{G}_{\text {ds}})~40$ and 34 for both NFinFET and PFinFET is achieved. In addition, N/PFinFETs demonstrate superior 1/f noise of 17/35 fV $^{2}\mu \text{m}^{2}$ /Hz at 1 kHz compared to 171/106 fV $^{\mathrm {\mathbf {2}}}\mu \text{m}^{2}$ /Hz of 28-nm planar N/PFETs. To extend the low-voltage operation and power saving of FinFET RF platform, ultralow ${V}_{t}$ N/PFinFETs in the range of 50 mV ${V}_{t}\text{s}$ are also developed. Furthermore, a deep n-well process is added to the platform to provide device and circuit isolation from substrate and supply noise, while realizing the creation of new devices such as vertical NPN, PCAP, and high breakdown voltage deep n-well junction diodes. Overall, a superior ${F}_{t}/{F}_{\textsf {max}}$ , high self-gain, low 1/f noise, and robust substrate isolation characteristics extend the capability of this new 14-nm FinFET technology to the analog and RF circuit applications.

14-nm FinFET Technology for Analog and RF Applications

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/pdf/advanced-compact-models-for-mosfets-164xnlcgtz.pdf

Josef S. Watts

Papers

Low voltage programmable storage element

A 22nm FDSOI Technology Optimized for RF/mmWave Applications

Modeling of Variation in Submicrometer CMOS ULSI Technologies

14-nm FinFET Technology for Analog and RF Applications

Advanced Compact Models for MOSFETs