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Author

Joseph P. Kozak

Other affiliations: University of Pittsburgh
Bio: Joseph P. Kozak is an academic researcher from Virginia Tech. The author has contributed to research in topics: Overvoltage & Power semiconductor device. The author has an hindex of 7, co-authored 21 publications receiving 112 citations. Previous affiliations of Joseph P. Kozak include University of Pittsburgh.

Papers
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Journal ArticleDOI
Ruizhe Zhang1, Joseph P. Kozak1, Ming Xiao1, Jingcun Liu1, Yuhao Zhang1 
TL;DR: In this article, a commercial p-gate GaN high-electron-mobility transistor (HEMT) with Ohmic-and Schottky-type gate contacts is studied.
Abstract: An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. These results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.

81 citations

Journal ArticleDOI
TL;DR: In this paper, the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching were studied. And the results suggest that the BV and over voltage margin of HEMTs in practical power switching can be significantly underestimated using the static BV.
Abstract: This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. These results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV.

53 citations

Proceedings ArticleDOI
Ruizhe Zhang1, Joseph P. Kozak1, Qihao Song1, Ming Xiao1, Jingcun Liu1, Yuhao Zhang1 
12 Dec 2020
TL;DR: In this paper, the transient breakdown voltage (BV) of a non-avalanche device in ultra-short pulses was measured based on the unclamped inductive switching (UIS) setup.
Abstract: This work develops a new method to measure the transient breakdown voltage (BV) of a non-avalanche device in ultra-short pulses, based on the unclamped inductive switching (UIS) setup. For the first time, the transient BVs of two types of 600/650-V enhancement-mode p-gate GaN high-electron-mobility transistors (HEMTs) are measured across the pulse duration from 25 ns (dv/dt > 100 V/ns) to 2 s. The BV is found to increase with the decreased pulse width, up to 500 V higher than the static BV. This behavior is explained by the reduced buffer trapping and the resulted lower peak electric field in shorter pulses. Slightly different BV dependences on pulse width are observed in the two types of devices and the mechanisms are unveiled. Repetitive UIS tests are also conducted, revealing that this newly-found "dynamic BV" can provide GaN HEMTs additional overvoltage and surge energy margin in power applications. These findings provide critical new insights on the BV and ruggedness of GaN HEMTs.

47 citations

Journal ArticleDOI
TL;DR: In this paper, methods for predicting gate voltage overshoot in normally-off gallium nitride (GAN) high electron mobility transistors (HEMTs) are derived in order to deliver optimal device performance.
Abstract: Recently, a major challenge in the adoption of wide bandgap semiconductors for power electronic applications is the need to trade device performance for device safety. In this article, methods for predicting gate voltage overshoot in normally-OFF gallium nitride (GAN) high electron mobility transistors (HEMTs) are derived in order to deliver optimal device performance. Two models are proposed; a simple, yet less accurate second order model and a complex, yet more accurate fourth order model. These models allow for the calculation of gate resistances necessary for a desired amount of gate voltage overshoot. The nonlinear capacitances of the device are considered in the analysis. The models are validated with an experimental double-pulse tester. These newly developed models allow design engineers to extract the best possible performance of commercially available GaN devices while keeping the devices in their safe-operating region.

24 citations

Journal ArticleDOI
Joseph P. Kozak1, Ruizhe Zhang1, Jingcun Liu1, Khai D. T. Ngo1, Yuhao Zhang1 
TL;DR: In this article, the authors evaluate the high-bias robustness of SiC MOSFETs under continuous, hard-switched, turn-off stresses with a dc bias higher than the device rated voltage.
Abstract: Evaluating the robustness of power semiconductor devices is key for their adoption into power electronics applications. Recent static acceleration tests have revealed that SiC MOSFETs can safely operate for thousands of hours at a blocking voltage higher than the rated voltage and near the avalanche boundary. This work evaluates the high-bias robustness of SiC MOSFETs under continuous, hard-switched, turn-off stresses with a dc-bias higher than the device rated voltage. Under this high-bias switching condition, SiC MOSFETs show degradation in merely tens of hours at 25°C and tens of minutes at 100°C. Two independent degradation and failure mechanisms are unveiled, one present in the gate-oxide and the other in the bulk-semiconductor regions, featured by the increase in gate leakage current and drain leakage current, respectively. The second degradation mechanism has not been previously reported in the literature; it is found to be related to the electron hopping along the defects in semiconductors generated in the switching tests. The comparison with the static acceleration tests reveals that both degradation mechanisms correlate to the high-bias switching transients rather than the high-bias blocking states. These results suggest the insufficient robustness of SiC MOSFETs under high-bias, hard switching conditions and the significance of using switching-based tests to evaluate the device robustness.

23 citations


Cited by
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01 Apr 1983

405 citations

Journal ArticleDOI
TL;DR: In this paper, the authors provide a comprehensive overview, address existing challenges, and unfold new research opportunities regarding the SiC power converter real-time lifetime prediction and extension, including component-level failure modes and mechanisms.
Abstract: Remaining useful lifetime prediction and extension of Si power devices have been studied extensively. Silicon carbide (SiC) power devices have been developed and commercialized. Specifically, SiC mosfet s have been utilized for the next generation high-voltage, high-power converters with smaller size and higher efficiency, covering various mainstream applications, including photovoltaic systems, electric vehicles, solid-state transformers, and more electric ships and airplanes. However, the SiC-based devices have different failure modes and mechanisms compared with Si counterparts. Therefore, a comprehensive review is critical to develop accurate lifetime prediction and extension strategies for SiC power converter systems. The SiC power device component-level failure modes and mechanisms are first investigated. Different accelerated lifetime tests and component-level lifetime models are then compared. Power converter system-level offline lifetime modeling techniques and software tools are further summarized. Besides, the SiC power converter condition monitoring strategies and health indicators are surveyed. The online measurement challenges are also studied. Furthermore, the system-level lifetime extension strategies are reviewed. By integrating device physics, statistical modeling, reliability engineering, and mechanical engineering with power electronics, this article is intended to provide a comprehensive overview, address existing challenges, and unfold new research opportunities regarding the SiC power converter real-time lifetime prediction and extension.

91 citations

Journal ArticleDOI
TL;DR: In this article, the authors provide a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability, which is a key missing piece to realize the full GaN platform with integrated digital, power, and RF electronics technologies.
Abstract: GaN technology is not only gaining traction in power and RF electronics but is also rapidly expanding into other application areas including digital and quantum computing electronics. This paper provides a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability. While GaN power devices have recently been commercialized in the 15–900 V classes, new GaN devices are greatly desirable to explore both higher-voltage and ultra-low-voltage power applications. Moving into the RF domain, ultra-high frequency GaN devices are being used to implement digitized power amplifier circuits, and further advances using the hardware–software co-design approach can be expected. On the horizon is the GaN CMOS technology, a key missing piece to realize the full-GaN platform with integrated digital, power, and RF electronics technologies. Although currently a challenge, high-performance p-type GaN technology will be crucial to realize high-performance GaN CMOS circuits. Due to its excellent transport characteristics and ability to generate free carriers via polarization doping, GaN is expected to be an important technology for ultra-low temperature and quantum computing electronics. Finally, given the increasing cost of hardware prototyping of new devices and circuits, the use of high-fidelity device models and data-driven modeling approaches for technology-circuit co-design are projected to be the trends of the future. In this regard, physically inspired, mathematically robust, less computationally taxing, and predictive modeling approaches are indispensable. With all these and future efforts, we envision GaN to become the next Si for electronics.

83 citations

Journal ArticleDOI
TL;DR: In this paper, the authors used the double-pulse-test (DPT) method to estimate conduction losses in converters with GaN HEMTs and found that the worst-case dc resistance is nearly two times higher than the dc resistance at the same temperature.
Abstract: Gallium nitride high-electron-mobility transistors (GaN HEMTs) exhibit dynamic on -resistance (d ${R_{\text{on}}}$ ), where the on -resistance immediately after turn- on is higher than the dc value at the same junction temperature. A proliferation of recent literature reports d ${R_{\text{on}}}$ , with some publishing an eight times increase in conduction losses and others finding that the problem is nonexistent. This variation can be largely attributed to the standardized double-pulse-test (DPT) method, which does not specify the blocking time and will ignore any effects that accumulate over multiple switching cycles. With no consistent measurements, designers are left without an accurate conduction loss estimate in converters with GaN HEMTs. We discuss the underlying causes of charge trapping to find the key influences over d ${R_{\text{on}}}$ , and show that the DPT technique gives invalid results. Our measurements validate that each operating parameter must be independently controlled and that only steady-state d ${R_{\text{on}}}$ measurements will predict in situ performance. For the commercial GaN HEMT tested in this letter, the worst-case d ${R_{\text{on}}}$ is nearly two times higher than the dc resistance at the same temperature, confirming that accurate d ${R_{\text{on}}}$ characterization remains critical to predicting converter characteristics. Finally, we provide a reporting framework for GaN HEMT manufacturers and methods to estimate conduction losses in converters with GaN HEMTs.

67 citations

Journal ArticleDOI
TL;DR: In this article, a total of 162 research papers focusing on GaN-based high-electron-mobility transistors (HEMTs) applications in mid-to high-power (over 500 W) converters are reviewed.
Abstract: Because of the global trends of energy demand increase and decarbonization, developing green energy sources and increasing energy conversion efficiency are recently two of the most urgent topics in energy fields. The requirements for power level and performance of converter systems are continuously growing for the fast development of modern technologies such as the Internet of things (IoT) and Industry 4.0. In this regard, power switching devices based on wide-bandgap (WBG) materials such as silicon carbide (SiC) and gallium nitride (GaN) are fast maturing and expected to greatly benefit power converters with complex switching schemes. In low- and medium-voltage applications, GaN-based high-electron-mobility transistors (HEMTs) are superior to conventional silicon (Si)-based devices in terms of switching frequency, power rating, thermal capability, and efficiency, which are crucial factors to enhance the performance of advanced power converters. Previously published review papers on GaN HEMT technology mainly focused on fabrication, device characteristics, and general applications. To realize the future development trend and potential of applying GaN technology in various converter designs, this paper reviews a total of 162 research papers focusing on GaN HEMT applications in mid- to high-power (over 500 W) converters. Different types of converters including direct current (DC)–DC, alternating current (AC)–DC, and DC–AC conversions with various configurations, switching frequencies, power densities, and system efficiencies are reviewed.

67 citations