Juha Kannisto

Bio: Juha Kannisto is an academic researcher from Tampere University of Technology. The author has contributed to research in topics: Synchronization & Clock synchronization. The author has an hindex of 1, co-authored 1 publications receiving 31 citations.

Precision Time Protocol Prototype on Wireless LAN

Abstract: IEEE 1588 is a new standard for precise clock synchronization for networked measurement and control systems in LAN environment. This paper presents the design and implementation of an IEEE 1588 PC software prototype for Wireless LANs (WLAN). Accuracy is improved using two new developed methods for outbound latency estimation. In addition, an algorithm for adjusting the local clock is presented. The achieved accuracy is measured and compared between WLAN and fixed LAN environments. The results show that 2.8 μs average clock offset can be reached on WLAN, while wired Ethernet connection enables 2.5 μs.

An Implementation of IEEE 1588 Over IEEE 802.11b for Synchronization of Wireless Local Area Network Nodes

Abstract: IEEE 1588 is a new standard to synchronize independent clocks running on separate nodes of a distributed measurement and control system. It is intended for high-accuracy implementations on compact systems such as a single subnet. This paper examines potential accuracy limitations introduced by the physical layer of the IEEE 802.11b wireless local area network. Experimental results are presented that show that these limitations do not preclude clock-synchronization accuracy of several hundred nanoseconds.

Time synchronization, deterministic data delivery and redundancy for cascaded nodes on full duplex ethernet networks

Abstract: A method and circuit for precisely synchronizing clocks in separate nodes on a communication network is provided by adjusting timestamps and related data in network messages. The circuit will allow a daisy-chain connection of the nodes and will forward time synchronization frames while accounting for delays in a manner that does not use boundary clocks, but does not depart from the IEEE 1588 standard protocol. The delays will be added on the fly to synchronization packets and the IP checksum and frame CRC will be adjusted. Deterministic data delivery and redundant data paths are also provided in a full duplex Ethernet network.

Clock Synchronization Over IEEE 802.11—A Survey of Methodologies and Protocols

Abstract: Just like Ethernet before, IEEE 802.11 is now transcending the borders of its usage from the office environment toward real-time communication on the factory floor. However, similar to Ethernet, the availability of synchronized clocks to coordinate and control communication and distributed real-time services is not a built-in feature in WLAN. Over the years, this has led to the design and use of a wide variety of customized protocols with varying complexity and precision, both for wired and wireless networks, in accordance with the increasingly demanding requirements from real-time applications. This survey looks into the details of synchronization over IEEE 802.11 with a particular focus on the infrastructure mode which is most relevant for industrial use cases. It highlights the different parameters which affect the performance of clock synchronization over WLAN and compares the performance of existing synchronization methods to analyze their shortcomings. Finally, it identifies new trends and directions for future research as well as features for wireless clock synchronization which will be required by the applications in the near future.

Software and hardware prototypes of the IEEE 1588 precision time protocol on wireless LAN

Abstract: IEEE 1588 is a standard for precise clock synchronization for networked measurement and control systems in LAN environment. This paper presents the design and implementation of two IEEE 1588 prototypes for wireless LAN (WLAN). The first one is implemented using a Linux PC platform and a standard IEEE 802.11 WLAN with modifications to the network device driver. The second prototype is implemented using an embedded WLAN development board that implements the synchronization functionality using an embedded processor with programmable logic device (PLD) circuits. The measured results show that 1.1 ns average clock offset can be reached on HW based implementation, while Linux PC network driver enables 660 ns with a standard WLAN. Although WLAN is an extremely difficult environment for the synchronization, the results achieved with the prototype are fully comparable to those achieved with wired LAN implementations

Synchronization of network nodes

Abstract: A method is provided of achieving frequency synchronization between a first clock at a first node and a second clock at a second node of a packet-carrying communications network. The method comprises, at the first node: measuring a property of packet transmission through the network between the first node and the second node; and sending the measurement of the property to the second node. The method further comprises, at the second node: measuring the same property of packet transmission through the network between the first node and the second node; and, using the measurement of the property made at the first node and the measurement of the property made at the second node to synchronize the frequency of the second clock with respect to the first clock.