J
Juin J. Liou
Researcher at Shenzhen University
Publications - 381
Citations - 5513
Juin J. Liou is an academic researcher from Shenzhen University. The author has contributed to research in topics: Electrostatic discharge & Bipolar junction transistor. The author has an hindex of 34, co-authored 358 publications receiving 4958 citations. Previous affiliations of Juin J. Liou include Zhejiang University & University of Central Florida.
Papers
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Journal ArticleDOI
A review of recent MOSFET threshold voltage extraction methods
TL;DR: Several of the extraction methods currently used to determine the value of threshold voltage from the measured drain current versus gate voltage transfer characteristics, focusing specially on single-crystal bulk MOSFETs are reviewed.
Journal ArticleDOI
Revisiting MOSFET threshold voltage extraction methods
Adelmo Ortiz-Conde,Francisco J. García-Sánchez,Juan Muci,Alberto Terán Barrios,Juin J. Liou,Juin J. Liou,Ching-Sung Ho +6 more
TL;DR: An up-to-date review of the several extraction methods commonly used to determine the value of the threshold voltage of MOSFETs, which includes the different methods that extract this quantity from the drain current versus gate voltage transfer characteristics measured under linear operation conditions for crystalline and non-crystalline MOSfETs.
Journal ArticleDOI
Electrostatic discharge in semiconductor devices: an overview
J.E. Vinson,Juin J. Liou +1 more
TL;DR: In this article, the impact of ESD on the IC industry and details the four stages of an ESD event: (1) charge generation, (2) charge transfer, (3) device response and (4) device failure.
Book
Modern Microwave Transistors: Theory, Design, and Performance
Frank Schwierz,Juin J. Liou +1 more
TL;DR: In this article, the authors discuss the properties of microwave transistors, including physical constants and unit Conversions, and two-port calculations of microwave frequency bands, as well as their properties.
Journal ArticleDOI
A Review of Core Compact Models for Undoped Double-Gate SOI MOSFETs
TL;DR: In this paper, the authors review the compact-modeling framework for undoped double-gate (DG) silicon-on-insulator (SOI) MOSFETs.