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Jun Fan

Researcher at Missouri University of Science and Technology

Publications -  505
Citations -  7033

Jun Fan is an academic researcher from Missouri University of Science and Technology. The author has contributed to research in topics: Printed circuit board & Equivalent circuit. The author has an hindex of 36, co-authored 482 publications receiving 5641 citations. Previous affiliations of Jun Fan include Ulsan National Institute of Science and Technology & University of Missouri.

Papers
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Signal Integrity Design for High-Speed Digital Circuits: Progress and Directions

TL;DR: This paper reviews recent progress and future directions of signal integrity design for high-speed digital circuits, focusing on four areas: signal propagation on transmission lines, discontinuity modeling and characterization, measurement techniques, and link-path design and analysis.
Patent

Coaxial cable bragg grating sensor

TL;DR: In this article, a coaxial cable sensor device with periodic impedance discontinuities along the length of its cable is described, which can be used to measure temperature, pressure, strain, and acoustic waves in building structures.
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Physics-Based Via and Trace Models for Efficient Link Simulation on Multilayer Structures Up to 40 GHz

TL;DR: In this paper, an analytical model for vias and traces is presented for simulation of multilayer interconnects at the package and printed circuit board levels, which can be applied to efficiently simulate a wide range of structures.
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An Improved Dipole-Moment Model Based on Near-Field Scanning for Characterizing Near-Field Coupling and Far-Field Radiation From an IC

TL;DR: In this paper, an improved dipole-moment model for characterizing near field coupling and far field radiation from an IC based on near-field scanning is proposed, where an array of electric and magnetic dipole moments is used to reproduce the field distributions in a scanning plane above an IC.
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Analytical Evaluation of Via-Plate Capacitance for Multilayer Printed Circuit Boards and Packages

TL;DR: In this article, the via-plate capacitance for a via transition to a multilayer printed circuit board is evaluated analytically in terms of higher order parallel-plate modes.