Jung Uk Cho

Bio: Jung Uk Cho is an academic researcher from Samsung. The author has contributed to research in topics: Image processing & Field-programmable gate array. The author has an hindex of 13, co-authored 55 publications receiving 1031 citations. Previous affiliations of Jung Uk Cho include Sungkyunkwan University & University of California, Los Angeles.

FPGA Design and Implementation of a Real-Time Stereo Vision System

Abstract: Stereo vision is a well-known ranging method because it resembles the basic mechanism of the human eye. However, the computational complexity and large amount of data access make real-time processing of stereo vision challenging because of the inherent instruction cycle delay within conventional computers. In order to solve this problem, the past 20 years of research have focused on the use of dedicated hardware architecture for stereo vision. This paper proposes a fully pipelined stereo vision system providing a dense disparity image with additional sub-pixel accuracy in real-time. The entire stereo vision process, such as rectification, stereo matching, and post-processing, is realized using a single field programmable gate array (FPGA) without the necessity of any external devices. The hardware implementation is more than 230 times faster when compared to a software program operating on a conventional computer, and shows stronger performance over previous hardware-related studies.

Fpga-based face detection system using Haar classifiers

Abstract: This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image scaling, integral image generation, pipelined processing as well as classifier, and parallel processing multiple classifiers to accelerate the processing speed of the face detection system. Also we discuss the optimization of the proposed architecture which can be scalable for configurable devices with variable resources. The proposed architecture for face detection has been designed using Verilog HDL and implemented in Xilinx Virtex-5 FPGA. Its performance has been measured and compared with an equivalent software implementation. We show about 35 times increase of system performance over the equivalent software implementation.

An FPGA-Based Multiple-Axis Motion Control Chip

Abstract: This paper presents the design and implementation of a multiple-axis motion control chip using a field-programmable gate array (FPGA). This multiple-axis motion control chip is designed to control a multiple-axis motion system such as a robotic arm manipulator or a computer numerical control machine. The proposed motion control chip has many functions. These include velocity profile generation, interpolation calculation, inverse kinematics calculation, proportional-integral-derivative control, feedback count, pulse integration, data conversion, clock generation, and external interfacing. These functions are designed using the VHSIC hardware description language and implemented on an FPGA according to the electronic design automation design methodology. This allows for a highly sampled, accurate, flexible, compact, low-power, and low-cost motion control system. The detailed design of the proposed motion control chip is presented. A multiple-axis motion control system using this chip is implemented, and its performance is measured. The multiple-axis motion control system is implemented on a platform consisting of a chip-based multiple-axis motion controller, analog ac servo drivers, a selective compliant assembly robot arm robot, and a host personal computer.

A Real-Time Object Tracking System Using a Particle Filter

Abstract: Particle filters have attracted much attention due to their robust tracking performance in cluttered environments. Particle filters maintain multiple hypotheses simultaneously and use a probabilistic motion model to predict the position of the moving object, and this constitutes a bottleneck to the use of particle filtering in real-time systems due to the expensive computations required. In order to track moving objects in real-time without delay and loss of image sequences, a particle filter algorithm specifically designed for a circuit and the circuit of the object tracking algorithm using the particle filter are proposed. This circuit is designed by VHDL (VHSIC hardware description language), and implemented in an FPGA (field programmable gate array). All of the functions of the proposed particle filter used to track moving objects are implemented in the FPGA. The object tracking system employing this circuit is implemented and then its performance is measured

Parallelized Architecture of Multiple Classifiers for Face Detection

Abstract: This paper presents a parallelized architecture of multiple classifiers for face detection based on the Viola and Jones object detection method. This method makes use of the AdaBoost algorithm which identifies a sequence of Haar classifiers that indicate the presence of a face. We describe the hardware design techniques including image scaling, integral image generation, pipelined processing of classifiers, and parallel processing of multiple classifiers to accelerate the processing speed of the face detection system. Also we discuss the parallelized architecture which can be scalable for configurable device with variable resources. We implement the proposed architecture in Verilog HDL on a Xilinx Virtex-5 FPGA and show the parallelized architecture of multiple classifiers can have 3.3× performance gain over the architecture of a single classifier and an 84× performance gain over an equivalent software solution.

Computer vision : a modern approach = 计算机视觉 : 一种现代的方法

Abstract: From the Publisher: The accessible presentation of this book gives both a general view of the entire computer vision enterprise and also offers sufficient detail to be able to build useful applications. Users learn techniques that have proven to be useful by first-hand experience and a wide range of mathematical methods. A CD-ROM with every copy of the text contains source code for programming practice, color images, and illustrative movies. Comprehensive and up-to-date, this book includes essential topics that either reflect practical significance or are of theoretical importance. Topics are discussed in substantial and increasing depth. Application surveys describe numerous important application areas such as image based rendering and digital libraries. Many important algorithms broken down and illustrated in pseudo code. Appropriate for use by engineers as a comprehensive reference to the computer vision enterprise.

Display apparatus and control method thereof

Abstract: A display apparatus includes an image processor which processes an image to display an image content; a display unit which displays thereon an image content that is processed by the image processor; and a controller which displays a user interface (UI) menu including a plurality of UI items to search the image content, as one of a two-dimensional (2D) layout by which the plurality of UI items are arranged in a 2D manner, and a three-dimensional (3D) layout by which the plurality of UI items are arranged in a 3D manner , and changes displaying the one of the layouts to display the other of the layouts according to a user's command while maintaining a continuity of the arrangement of the plurality of UI items. Accordingly, search for an image content can be efficiently performed by using a UI menu.

Demo: Glimpse -- Continuous, Real-Time Object Recognition on Mobile Devices

Abstract: Glimpse is a continuous, real-time object recognition system for camera-equipped mobile devices. Glimpse captures full-motion video, locates objects of interest, recognizes and labels them, and tracks them from frame to frame for the user. Because the algorithms for object recognition entail significant computation, Glimpse runs them on server machines. When the latency between the server and mobile device is higher than a frame-time, this approach lowers object recognition accuracy. To regain accuracy, Glimpse uses an active cache of video frames on the mobile device. A subset of the frames in the active cache are used to track objects on the mobile, using (stale) hints about objects that arrive from the server from time to time. To reduce network bandwidth usage, Glimpse computes trigger frames to send to the server for recognizing and labeling. Experiments with Android smartphones and Google Glass over Verizon, ATT without Glimpse, continuous detection is non-functional (0.2%-1.9% precision).

Review of stereo vision algorithms and their suitability for resource-limited systems

Abstract: A significant amount of research in the field of stereo vision has been published in the past decade. Considerable progress has been made in improving accuracy of results as well as achieving real-time performance in obtaining those results. This work provides a comprehensive review of stereo vision algorithms with specific emphasis on real-time performance to identify those suitable for resource-limited systems. An attempt has been made to compile and present accuracy and runtime performance data for all stereo vision algorithms developed in the past decade. Algorithms are grouped into three categories: (1) those that have published results of real-time or near real-time performance on standard processors, (2) those that have real-time performance on specialized hardware (i.e. GPU, FPGA, DSP, ASIC), and (3) those that have not been shown to obtain near real-time performance. This review is intended to aid those seeking algorithms suitable for real-time implementation on resource-limited systems, and to encourage further research and development of the same by providing a snapshot of the status quo.

Automatic fish classification for underwater species behavior understanding

Abstract: The aim of this work is to propose an automatic fish classification system that operates in the natural underwater environment to assist marine biologists in understanding subehavior. Fish classification is performed by combining two types of features: 1) Texture features extracted by using statistical moments of the gray-level histogram, spatial Gabor filtering and properties of the co-occurrence matrix and 2) Shape Features extracted by using the Curvature Scale Space transform and the histogram of Fourier descriptors of boundaries. An affine transformation is also applied to the acquired images to represent fish in 3D by multiple views for the feature extraction. The system was tested on a database containing 360 images of ten different species achieving as average correct rate of about 92%. Then, fish trajectories extracted using the proposed fish classification combined with a tracking system, are analyzed in order to understand anomalous behavior. In detail, the tracking layer computer fish trajectories, the classification layer associates trajectories to fish species and then by clustering these trajectories we are able to detect unusual fish behaviors to be further investigated by marine biologists.