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K. Fischer

Bio: K. Fischer is an academic researcher from Intel. The author has contributed to research in topics: Medicine & Multiple patterning. The author has an hindex of 2, co-authored 2 publications receiving 1399 citations.

Papers
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Proceedings ArticleDOI
01 Dec 2007
TL;DR: In this paper, a 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume manufacturing process, resulting in the highest drive currents yet reported for NMOS and PMOS.
Abstract: A 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume manufacturing process. The transistors feature 1.0 nm EOT high-k gate dielectric, dual band edge workfunction metal gates and third generation strained silicon, resulting in the highest drive currents yet reported for NMOS and PMOS. The technology also features trench contact based local routing, 9 layers of copper interconnect with low-k ILD, low cost 193 nm dry patterning, and 100% Pb-free packaging. Process yield, performance and reliability are demonstrated on 153 Mb SRAM arrays with SRAM cell size of 0.346 mum2, and on multiple microprocessors.

973 citations

Proceedings ArticleDOI
01 Dec 2014
TL;DR: In this paper, a 14nm logic technology using 2nd-generation FinFET transistors with a novel subfin doping technique, self-aligned double patterning (SADP) for critical patterning layers, and air-gapped interconnects at performance-critical layers is described.
Abstract: A 14nm logic technology using 2nd-generation FinFET transistors with a novel subfin doping technique, self-aligned double patterning (SADP) for critical patterning layers, and air-gapped interconnects at performance-critical layers is described. The transistors feature rectangular fins with 8nm fin width and 42nm fin height, 4th generation high-k metal gate, and 6th-generation strained silicon, resulting in the highest drive currents yet reported for 14nm technology. This technology is in high-volume manufacturing.

558 citations

Journal ArticleDOI
TL;DR: The consensus supports a link between some variants in gonadotropin/gonadotropic receptor genes and ovarian stimulation outcomes; however, further research is needed to clarify these findings.
Abstract: Background A Delphi consensus was conducted to evaluate the influence of single nucleotide polymorphisms (SNPs) in genes encoding gonadotropin and gonadotropin receptors on clinical ovarian stimulation outcomes following assisted reproductive technology (ART) treatment. Methods Nine experts plus two Scientific Coordinators discussed and amended statements plus supporting references proposed by the Scientific Coordinators. The statements were distributed via an online survey to 36 experts, who voted on their level of agreement or disagreement with each statement. Consensus was reached if the proportion of participants agreeing or disagreeing with a statement was >66%. Results Eleven statements were developed, of which two statements were merged. Overall, eight statements achieved consensus and two statements did not achieve consensus. The statements reaching consensus are summarized here. (1) SNP in the follicle stimulating hormone receptor (FSHR), rs6166 (c.2039A>G, p.Asn680Ser) (N=5 statements): Ser/Ser carriers have higher basal FSH levels than Asn/Asn carriers. Ser/Ser carriers require higher amounts of gonadotropin during ovarian stimulation than Asn/Asn carriers. Ser/Ser carriers produce fewer oocytes during ovarian stimulation than Asn/Asn or Asn/Ser carriers. There is mixed evidence supporting an association between this variant and ovarian hyperstimulation syndrome. (2) SNP of FSHR, rs6165 (c.919G>A, p.Thr307Ala) (N=1 statement): Few studies suggest Thr/Thr carriers require a shorter duration of gonadotropin stimulation than Thr/Ala or Ala/Ala carriers. (3) SNP of FSHR, rs1394205 (−29G>A) (N=1 statement): Limited data in specific ethnic groups suggest that A/A allele carriers may require higher amounts of gonadotropin during ovarian stimulation and produce fewer oocytes than G/G carriers. (4) SNP of FSH β-chain (FSHB), rs10835638 (−211G>T) (N=1 statement): There is contradictory evidence supporting an association between this variant and basal FSH levels or oocyte number. (5) SNPs of luteinizing hormone β-chain (LHB) and LH/choriogonadotropin receptor (LHCGR) genes (N=1 statement): these may influence ovarian stimulation outcomes and could represent potential future targets for pharmacogenomic research in ART, although data are still very limited. Conclusions This Delphi consensus provides clinical perspectives from a diverse international group of experts. The consensus supports a link between some variants in gonadotropin/gonadotropin receptor genes and ovarian stimulation outcomes; however, further research is needed to clarify these findings.

9 citations

Journal ArticleDOI
TL;DR: In this article , a retrospective real-world evidence analysis of the costs per live birth for reference recombinant human follicle-stimulating hormone alfa (r-hFSH-alfa) versus highly purified urinary human menopausal gonadotropin (hMG-HP), based on data from a German in vitro fertilization registry (RecDate), was performed.
Abstract: This was a retrospective real-world evidence analysis of the costs per live birth for reference recombinant human follicle-stimulating hormone alfa (r-hFSH-alfa) versus highly purified urinary human menopausal gonadotropin (hMG-HP), based on data from a German in vitro fertilization registry (RecDate). Pregnancy and live birth rates from the RecDate real-world evidence study over three complete assisted reproductive technology (ART) cycles using the same gonadotropin drug were used as clinical inputs. Costs related to ART treatment and to drugs were obtained from public sources. Treatment with r-hFSH-alfa resulted in higher adjusted cumulative live birth rates versus hMG-HP after one (25.3% vs. 22.3%), two (30.9% vs. 27.5%), and three (31.9% vs. 28.6%) ART cycles. Costs per live birth were lower with r-hFSH-alfa versus hMG-HP after one (€17,938 vs. €20,054), two (€18,251 vs. €20,437), and three (€18,473 vs. €20,680) ART cycles. r-hFSH-alfa was found to be a cost-effective strategy compared with hMG-HP over three cycles.

3 citations

Proceedings ArticleDOI
28 Apr 2023
TL;DR: In this article , the authors describe the direct print Extreme Ultra Violet (EUV) technology used for lithographic patterning of 30-36 nm pitch metal layers of Intel 18A technology node.
Abstract: This paper describes the direct print Extreme Ultra Violet (EUV) technology used for lithographic patterning of 30-36 nm pitch metal layers of Intel 18A technology node. Direct print EUV delivers cost effective pitch scaling to enable flexible design rules and ease of use for layout designers. Careful co-optimization of the illumination source, photoresist and lithography stack is essential to resolve the tightest pitches. Optimum CDSEM metrology conditions and EUV specific requirements such as full field correction with thru slit, flare and black border compensation are critical to improve the quality of the optical proximity correction (OPC) flows. OPC algorithms were used to maximize the process window by using width sizing and pitch shifting to meet lithographic printability criteria while pushing mask manufacturability constraints to their healthy limits. The sizing of metal lines is modelled and fed to the RC extraction flows to close the fabdesign house feedback loop to improve accuracy of timing closure. Multiple test masks were specifically designed to increase sensitivity of defect metrology and accelerate yield learning. Our results from multiple product vehicles demonstrate achievement of technology readiness milestones.

1 citations


Cited by
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Journal ArticleDOI
TL;DR: Because monolayer MoS(2) has a direct bandgap, it can be used to construct interband tunnel FETs, which offer lower power consumption than classical transistors, and could also complement graphene in applications that require thin transparent semiconductors, such as optoelectronics and energy harvesting.
Abstract: Two-dimensional materials are attractive for use in next-generation nanoelectronic devices because, compared to one-dimensional materials, it is relatively easy to fabricate complex structures from them. The most widely studied two-dimensional material is graphene, both because of its rich physics and its high mobility. However, pristine graphene does not have a bandgap, a property that is essential for many applications, including transistors. Engineering a graphene bandgap increases fabrication complexity and either reduces mobilities to the level of strained silicon films or requires high voltages. Although single layers of MoS(2) have a large intrinsic bandgap of 1.8 eV (ref. 16), previously reported mobilities in the 0.5-3 cm(2) V(-1) s(-1) range are too low for practical devices. Here, we use a halfnium oxide gate dielectric to demonstrate a room-temperature single-layer MoS(2) mobility of at least 200 cm(2) V(-1) s(-1), similar to that of graphene nanoribbons, and demonstrate transistors with room-temperature current on/off ratios of 1 × 10(8) and ultralow standby power dissipation. Because monolayer MoS(2) has a direct bandgap, it can be used to construct interband tunnel FETs, which offer lower power consumption than classical transistors. Monolayer MoS(2) could also complement graphene in applications that require thin transparent semiconductors, such as optoelectronics and energy harvesting.

12,477 citations

Journal ArticleDOI
TL;DR: A review of electronic devices based on two-dimensional materials, outlining their potential as a technological option beyond scaled complementary metal-oxide-semiconductor switches and the performance limits and advantages, when exploited for both digital and analog applications.
Abstract: The compelling demand for higher performance and lower power consumption in electronic systems is the main driving force of the electronics industry's quest for devices and/or architectures based on new materials. Here, we provide a review of electronic devices based on two-dimensional materials, outlining their potential as a technological option beyond scaled complementary metal-oxide-semiconductor switches. We focus on the performance limits and advantages of these materials and associated technologies, when exploited for both digital and analog applications, focusing on the main figures of merit needed to meet industry requirements. We also discuss the use of two-dimensional materials as an enabling factor for flexible electronics and provide our perspectives on future developments.

2,531 citations

Journal ArticleDOI
10 Nov 2011-ACS Nano
TL;DR: This report reports on the first integrated circuit based on a two-dimensional semiconductor MoS(2) transistors, capable of operating as inverters, converting logical "1" into logical "0", with room-temperature voltage gain higher than 1, making them suitable for incorporation into digital circuits.
Abstract: Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS2 represent the ultimate limit of miniaturization in the vertical dimension, are interesting as building blocks of low-power nanoelectronic devices, and are suitable for integration due to their planar geometry. Because they are less than 1 nm thin, 2D materials in transistors could also lead to reduced short channel effects and result in fabrication of smaller and more power-efficient transistors. Here, we report on the first integrated circuit based on a two-dimensional semiconductor MoS2. Our integrated circuits are capable of operating as inverters, converting logical “1” into logical “0”, with room-temperature voltage gain higher than 1, making them suitable for incorporat...

1,244 citations

Journal ArticleDOI
TL;DR: In this article, a mathematical framework to evaluate the performance of FETs and describe the challenges for improving the performances of short-channel FET in relation to the properties of 2D materials, including graphene, transition metal dichalcogenides, phosphorene and silicene.
Abstract: In the quest for higher performance, the dimensions of field-effect transistors (FETs) continue to decrease. However, the reduction in size of FETs comprising 3D semiconductors is limited by the rate at which heat, generated from static power, is dissipated. The increase in static power and the leakage of current between the source and drain electrodes that causes this increase, are referred to as short-channel effects. In FETs with channels made from 2D semiconductors, leakage current is almost eliminated because all electrons are confined in atomically thin channels and, hence, are uniformly influenced by the gate voltage. In this Review, we provide a mathematical framework to evaluate the performance of FETs and describe the challenges for improving the performances of short-channel FETs in relation to the properties of 2D materials, including graphene, transition metal dichalcogenides, phosphorene and silicene. We also describe tunnelling FETs that possess extremely low-power switching behaviour and explain how they can be realized using heterostructures of 2D semiconductors. Field-effect transistors (FETs) with semiconducting channels made from 2D materials are known to have fewer problems with short-channel effects than devices comprising 3D semiconductors. In this Review, a mathematical framework to evaluate the performance of FETs is outlined with a focus on the properties of 2D materials, such as graphene, transition metal dichalcogenides, phosphorene and silicene.

983 citations

Journal ArticleDOI
01 Sep 2019-Nature
TL;DR: The opportunities, progress and challenges of integrating atomically thin materials with silicon-based nanosystems are reviewed, and the prospects for computational and non-computational applications are considered.
Abstract: The development of silicon semiconductor technology has produced breakthroughs in electronics—from the microprocessor in the late 1960s to early 1970s, to automation, computers and smartphones—by downscaling the physical size of devices and wires to the nanometre regime. Now, graphene and related two-dimensional (2D) materials offer prospects of unprecedented advances in device performance at the atomic limit, and a synergistic combination of 2D materials with silicon chips promises a heterogeneous platform to deliver massively enhanced potential based on silicon technology. Integration is achieved via three-dimensional monolithic construction of multifunctional high-rise 2D silicon chips, enabling enhanced performance by exploiting the vertical direction and the functional diversification of the silicon platform for applications in opto-electronics and sensing. Here we review the opportunities, progress and challenges of integrating atomically thin materials with silicon-based nanosystems, and also consider the prospects for computational and non-computational applications. Progress in integrating atomically thin two-dimensional materials with silicon-based technology is reviewed, together with the associated opportunities and challenges, and a roadmap for future applications is presented.

804 citations