K. Hirano

Bio: K. Hirano is an academic researcher. The author has contributed to research in topics: Value noise & Gradient noise. The author has an hindex of 1, co-authored 1 publications receiving 42 citations.

A simple method of computing the input quantization and multiplication roundoff errors in a digital filter

Abstract: A simple method of calculating the steady-state value of the variance of the output noise of a digital filter due to the input quantization noise or internally generated noise from product round-off is presented. The output noise is expressed as a sum of simpler terms belonging to one of four basic groups. Explicit expressions have been developed for rapid evaluation of these terms in the expansion. The method is illustrated by means of examples.

The use of second-order information in the approximation of discreate-time linear systems

Abstract: It is common practice to partially characterize a filter with a finite portion of its impulse response, with the objective of generating a recursive approximation. This paper discusses the use of mixed first and second information, in the form of a finite portion of the impulse response and autocorrelation sequences. The discussion encompasses a number of techniques and algorithms for this purpose. Two approximation problems are studied: an interpolation problem and a least squares problem. These are shown to be closely related. The linear systems which form the solutions to these problems are shown to be stable. An efficient algorithm for obtaining solutions is given and shown to be closely related to a well-known algorithm of Levinson and the Jury stability test. The close connection between these algorithms suggests that they are fundamental in the numerical analysis of stable discrete-time linear systems.

Effects of quantization and overflow in recursive digital filters

Abstract: A classification is given of the various possible nonlinear effects that can occur in recursive digital filters due to signal quantization and adder overflow. The effects include limit cycles, overflow oscillations, and quantization noise. A review is given of recent literature on this subject. Alternative methods of avoiding some of these nonlinear phenomena are discussed.

Optimal synthesis of second-order state-space structures for digital filters

Abstract: Sufficient conditions are derived for a second-order statespace digital filter with L_2 scaling to be optimal with respect to output roundoff noise; and from these, a simple synthesis procedure is developed. Parallel-form designs produced by this method are equivalent to the block-optimal designs of Mullis and Roberts. The corresponding cascadeform designs are not equivalent, but they are shown, by example, to be quite close in performance. It is also shown that the coefficient sensitivities of this structure are closely related to its noise performance. Hence, the optimal design has low-coefficient sensitivity properties, and any other low-sensitivity design is a good candidate for near-optimal noise performance. The uniform-grid structure of Rader and Gold is an interesting and useful case in point.

Implementation of digital controllers—a survey

Abstract: Stimulated by microprocessor technology there is increasing interest in the issues of digital control implementation. This paper reviews these issues, from algorithms through current hardware up to the various problems arising with non-ideal behaviour of digital controllers.

Digital all-pass networks

Abstract: A systematic method is outlined to realize an m th-order all-pass digital transfer function using only m multipliers as a cascade of first-order and/or second-order all-pass sections. The realization is based on the multiplier extraction approach in which the n th-order filter section is considered as a digital (n + 1) -pair of which n pairs of input and output terminal variables are constrained by n multipliers. The transfer matrix parameters of the digital (n + 1) -pair, containing only delays and adders, are first identified from which the realization is obtained by inspection. Both canonic and noncanonic realizations are derived. All realizations are then compared with regard to the effect of multiplication roundoff and hardware requirements.