Cyclostationarity: half a century of research

Advances in global linear instability analysis of nonparallel and three-dimensional flows

This paper describes the latest and most advanced surface-potential-based model jointly developed by The Pennsylvania State University and Philips. Specific topics include model structure, mobility and velocity saturation description, further development and verification of symmetric linearization method, recent advances in the computational techniques for the surface potential, modeling of gate tunneling current, inclusion of the retrograde impurity profile, and noise sources. The emphasis of this paper is on incorporating the recent advances in MOS device physics and modeling within the compact modeling context

PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

In this paper, we propose a new harmonic balance simulation methodology based on a linear-centric modeling approach. A linear circuit representation of the nonlinear devices and associated parasitics is used along with corresponding time and frequency domain inputs to solve for the nonlinear steady-state response via successive chord (SC) iterations. For our circuit examples, this approach is shown to be up to 60/spl times/ more run-time efficient than traditional Newton-Raphson (N-R) based iterative methods, while providing the same level of accuracy. This SC-based approach converges as reliably as the N-R approaches, including for circuit problems which cause alternative relaxation-based harmonic balance approaches to fail. The efficacy of this linear-centric methodology further improves with increasing model complexity, the inclusion of interconnect parasitics and other analyses that are otherwise difficult with traditional nonlinear models.

/pdf/a-linear-centric-modeling-approach-to-harmonic-balance-1hgxpfo186.pdf

A Linear-Centric Modeling Approach to Harmonic Balance Analysis

https://www.dtc.umn.edu/s/resources/bib05eurasip.pdf

Bibliography on cyclostationarity

A method of providing simulation results includes detecting any power net and rail in a circuit netlist The circuit can be divided into net-partitioned blocks Using these net-partitioned blocks, a topological analysis can be performed to identify cuttable/un-cuttable devices and synchronization requirements Then, the circuit can be re-divided into rail-partitioned blocks Using these rail-partitioned blocks, a sparse solver can identify potential partitions, but eliminate fill-ins as determined by the topological analysis A cost function can be applied to the potential partitions as well as the identified cuttable/un-cuttable devices to determine final cut points in the circuit and dynamic inputs to the final blocks Simulation can be performed on the final blocks and simulation results can be generated

Automatic, Hierarchy-Independent Partitioning Method For Transistor-Level Circuit Simulation

A method and apparatus for simulating the design of an integrated circuit uses a processor (200). The processor (200) executes a simulator (540) from memory (280) to exercise a model (544). The data points (15-27) of an output signal are stored in a history data file (542). The techniques used to generate each of the data points (15-27) are also stored in the history data in file (542). The history data are then used to generate a converted output signal that has a uniform time scale. If the converted output signal requires the generation of a desired data point, then the approximation technique used to generate the following data point stored in the history data (542) is used.

Method of simulating an integrated circuit

Krylov subspace techniques in harmonic balance simulations become increasingly ineffective when applied to strongly nonlinear circuits. This limitation is particularly important in the simulation if the circu it has components being operated in a very nonlinear region. Ev en if the circuit contains only a few very nonlinear components, Krylov methods using standard preconditioners can become ineffective. To overcome this problem, we present two adaptive preconditioners that dynamically exploit the properties of the harmonic balance Jacobian. With these techniques we have been able to retain the advantages of Krylov methods even for strongly nonlinear circuits. Some numerical experiments illustrating the techniques are presented.

http://www.cecs.uci.edu/~papers/compendium94-03/papers/2000/aspdac00/pdffiles/6e_1.pdf

The enchancing of efficiency of the harmonic balance analysis by adaptation of preconditioner to circuit nonlinearity

Krylov subspace techniques in harmonic balance simulations become increasingly ineffective when applied to strongly nonlinear circuits. This limitation is particularly important in the simulation of the nonlinear aspects of a circuit such as the 1 dB gain compression or if the circuit has components being operated in a very nonlinear region. Even if the circuit contains only a few very nonlinear components, Krylov methods using standard preconditioners can become ineffective. To overcome this problem, we present an adaptive preconditioner that dynamically exploits the properties of the harmonic balance Jacobian. With this technique we have been able to retain the advantages of Krylov methods even for strongly nonlinear circuits. Some numerical experiments illustrating the technique are presented.

https://ieeexplore.ieee.org/iel5/6330/16923/00779875.pdf

K.K. Gullapalli

Papers

Automatic, Hierarchy-Independent Partitioning Method For Transistor-Level Circuit Simulation

Method of simulating an integrated circuit

The enchancing of efficiency of the harmonic balance analysis by adaptation of preconditioner to circuit nonlinearity

Adaptive preconditioners for the simulation of extremely nonlinear circuits using harmonic balance

Evaluation of Oscillator Phase Transfer Functions