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K.N. Bhat

Bio: K.N. Bhat is an academic researcher from Indian Institute of Technology Madras. The author has contributed to research in topics: Silicon on insulator & Silicon. The author has an hindex of 9, co-authored 33 publications receiving 322 citations.

Papers
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TL;DR: In this article, the breakdown voltage of planar junctions equipped with field plates and guard rings is determined by evaluating the ionization integral using the potential distribution computed by solving Poisson's equation in two-dimensions by a finite difference method.
Abstract: The breakdown voltages of planar junctions (both nonpunchthrough and punchthrough cases) equipped with field plates and guard rings are determined by evaluating the ionization integral using the potential distribution computed by solving Poisson's equation in two-dimensions by a finite difference method. The influence of various parameters, such as substrate doping concentration, n-layer thickness, field oxide thickness, cylindrical junction curvature, field plate width, and the spacing between field plate and guard ring, on the breakdown voltage is extensively studied. It is shown that an optimum value exists for the field oxide thickness to realize maximum breakdown voltage. The study also shows that the optimum oxide thickness depends upon cylindrical junction curvature, substrate doping concentration, and n-layer thickness. It is further shown that the permittivity of a passivant dielectric layer deposited over field plate structure influences the breakdown voltage when breakdown takes place at the field plate edge. The numerical results are compared with the experimental data, and good agreement between the two is observed. Based on this two-dimensional study, design guidelines are provided for achieving breakdown voltages close to maximum realizable values, by conserving the device area and reducing the ionization at the field plant edge. The results presented clearly demonstrate the superiority of the field plate design using punchthrough structures over nonpunchthrough structures in realizing a given breakdown voltage. >

64 citations

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TL;DR: In this paper, the authors proposed a model that considers single-crystal silicon grain in equilibrium with amorphous silicon grain boundary to obtain near zero temperature coefficient of resistivity.
Abstract: One of the key benefits of using polysilicon as the material for resistors and piezoresistors is that the temperature coefficient of resistivity (TCR) can be tailored to be negative, zero, or positive by adjusting the doping concentration. This paper focuses on optimization of the boron doping of low-pressure chemical vapor deposited polysilicon resistors for obtaining near-zero TCR and development of a physical model that explains quantitatively all the results obtained in the optimization experiments encompassing the doping concentration ranges that show negative, near-zero, and positive TCR values in the polysilicon resistors. The proposed model considers single-crystal silicon grain in equilibrium with amorphous silicon grain boundary. The grain boundary carrier concentration is calculated considering exponential band tails in the density of states for amorphous silicon in the grain boundaries. Comparison of the results from the model shows excellent agreement with the measured values of resistivity as well as TCR for heavily doped polysilicon. It is shown that the trap density for holes in the grain boundary increases as the square root of the doping concentration, which is consistent with the defect compensation model of doping in the amorphous silicon grain boundaries

60 citations

Journal ArticleDOI
TL;DR: In this article, a charge sheet analytic model is presented for the channel currents of long-channel SOI MOSFETs, and the results include analytic expressions for the drift and diffusion current components of individual channel currents, the front-gate and back-gate interaction parameter, and an analytic correlation between the surface potentials of the front and back channels when there is coupling between the two gates under nonthermal equilibrium conditions.
Abstract: Numerical charge sheet models applicable for all bias conditions are presented for the channel currents of long-channel SOI MOSFETs. From a comparison of the two models it is shown that the charge sheet analytic model accurately predicts the channel currents from weak to strong inversion regions. The results include analytic expressions for the drift and diffusion current components of individual channel currents, the front-gate and back-gate interaction parameter, and an analytic correlation between the surface potentials of the front and back channels when there is coupling between the two gates under nonthermal equilibrium conditions. The effect of SOI (silicon on insulator) film thickness on the drain current was investigated under different bias conditions for the back gate, and it was found that thin films are beneficial from the point of increased drain currents if the back channel is in depletion or inversion. It is also shown that, in addition to the charge coupling effects, dynamic interaction between the channels exists if the static current in one of the channels saturates. >

48 citations

Journal ArticleDOI
01 Apr 2006
TL;DR: In this article, the phosphorus diffusion source is used instead of boron dopant for realizing the piezo-resistors, and the results obtained in our laboratory have clearly demonstrated that by optimizing the phosphorous diffusion temperature and duration, it is possible to achieve sensitivities in excess of 20mV /Bar for bridge input voltage of 10V, with linearity within 1% over a differential pressure range up to 10Bar (10 6Pascal), and burst pressure of 50 Bar as compared to the 10mV/Bar sensitivity obtained with Boron doped poly
Abstract: It is generally accepted that the piezo-resistive coefficient in single crystal silicon is higher when P-type impurities such as boron are used for doping the resistors. In this paper we demonstrate that the sensitivity of polycrystalline silicon piezo-resistive pressure sensors can be enhanced considerably when phosphorus diffusion source is used instead of boron dopant for realizing the piezo-resistors. Pressure sensors have been designed and fabricated with the polycrystalline piezo-resistors connected in the form of a Wheatstone bridge and laid out on thermal oxide grown on membranes obtained with a Silicon On Insulator (SOI) approach. The SOI wafers required for this purpose have been realized in-house by Silicon Fusion Bonding (SFB) and etch back technique in our laboratory. This approach provides excellent isolation between the resistors and enables zero temperature coefficient of the polysilicon resistor. The results obtained in our laboratory have clearly demonstrated that by optimizing the phosphorus diffusion temperature and duration, it is possible to achieve sensitivities in excess of 20mV /Bar for bridge input voltage of 10V, with linearity within 1% over a differential pressure range up to 10Bar (10 6Pascal), and burst pressure in excess of 50 Bar as compared to the 10mV /Bar sensitivity obtained with boron doped polysilicon piezo-resistors. This enhancement is attributed to grain boundary passivation by phosphorous atoms.

23 citations

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TL;DR: In this paper, the effects of the injection of holes into the collector and the back injection of the electrons from the collector into the base of a high-voltage power transistor operating in the quasi-saturation region are analyzed taking into account the effect of injection of hole injection and back injection.
Abstract: High-voltage power transistor operating in the quasi-saturation region is analyzed taking into account the effects of the injection of holes into the collector and the back injection of the electrons from the collector into the base. It is shown that the collector recombination lifetime τ ν plays an important role on the power transistor characteristics. Experimental results available in the literature on the output characteristics and the injection level dependence of current gain of transistors agree very well with the analysis presented in this paper. It is also shown that the h FE I C product in the quasi-saturation region depends upon the collector region lifetime τ ν .

17 citations


Cited by
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TL;DR: In this paper, the effect of water vapour on the formation of a more porous scale is discussed. But, while there is experimental evidence for altered mechanical behaviour, there is very little data on relevant mechanical properties.

505 citations

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the breakdown (V/sub br/) enhancement potential of the field plate (FP) technique in the context of AlGaN/GaN power HEMTs.
Abstract: We investigate the breakdown (V/sub br/) enhancement potential of the field plate (FP) technique in the context of AlGaN/GaN power HEMTs. A comprehensive account of the critical geometrical and material variables controlling the field distribution under the FP is provided. A systematic procedure is given for designing a FP device, using two-dimensional (2-D) simulation, to obtain the maximum V/sub br/, with minimum degradation in on-resistance and frequency response. It is found that significantly higher V/sub br/ can be achieved by raising the dielectric constant (/spl epsi//sub i/) of the insulator beneath the FP. Simulation gave the following estimates. The FP can improve the V/sub br/ by a factor of 2.8-5.1, depending on the 2-DEG concentration (n/sub s/) and /spl epsi//sub i/. For n/sub s/=1/spl times/10/sup 13//cm/sup 2/, the V/sub br/ can be raised from 123 V to 630 V, using a 2.2 /spl mu/m FP on a 0.8 /spl mu/m silicon nitride, and 4.7 /spl mu/m gate-drain separation. The methodology of this paper can be extended to the design of FP structures in other lateral FETs, such as MESFETs and LD-MOSFETs.

447 citations

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TL;DR: In this paper, the authors define the multiplication factor and the ionization rate together with their interrelationship, multiplication and breakdown models for diodes and MOS transistors.
Abstract: After defining the multiplication factor and the ionization rate together with their interrelationship, multiplication and breakdown models for diodes and MOS transistors are discussed. Different ionization models are compared and test structures are discussed for measuring the multiplication factor accurately enough for reliable extraction of the ionization rates. Multiplication measurements at different temperatures are performed on a bipolar NPN transistor, and yield new electron ionization rates at relatively low electrical fields. An explanation for the spread of the experimental values of the existing data on ionization rate is given. A new implementation method for a local avalanche model into a device simulator is presented. The results are less sensitive to the chosen grid size than the ones obtained from the existing method.

209 citations

Journal ArticleDOI
TL;DR: In this paper, a review and analysis of various design considerations and principles for silicon piezoresistive pressure sensors is presented, and the effect of these considerations on the sensor output taking help of various CAD tools.
Abstract: Over the past four decades, the field of silicon piezoresistive pressure sensors has undergone a major revolution in terms of design methodology and fabrication processes. Cutting edge fabrication technologies have resulted in improved precision in key factors like dimensions of diaphragm and placement of piezoresistors. Considering the unique nature of each sensor and the trade-offs in design, it is not feasible to follow a standard design approach. Thus, it is useful to derive the specific design from a number of important factors to arrive at the `ideal' design. In this paper, we critically review and analyze the various design considerations and principles for silicon piezoresistive pressure sensor. We also report the effect of these considerations on the sensor output taking help of various CAD tools. Keeping in view the accuracy of state-of-the-art fabrication tools and the stringent demands of the present day market, it has become important to include many of these design aspects. Modelling using analytical expressions for thin plates has also been looked into as it gives a quick guideline and estimation of critical parameters before detailed finite element method analysis. Wherever possible, fabrication imperfections and their effects have been discussed. Dependency of piezoresistive coefficients on temperature and doping concentration, the effect of clamping condition of diaphragms and fabrication using wet bulk micromachining is also analyzed. Silicon-on-insulator based sensors along with innovative design strategies, and future trends have also been discussed. This paper will serve as a quick and comprehensive guide for pressure sensor developers.

180 citations