K. Padmanabhan

Bio: K. Padmanabhan is an academic researcher from VIT University. The author has contributed to research in topics: Reliability (semiconductor). The author has an hindex of 1, co-authored 1 publications receiving 1 citations.

Modelling and electro-hygrothermo-mechanical reliability analyses of leadless dual IC packages

Abstract: This investigation describes a part of the ongoing activities in the advanced semiconductor materials and packaging collaboration with SPEL Semiconductor Ltd. The aim of the investigation was to generate 3D models of the IC packages, 8L and 12L (8 pin and 12 pin configurations) micro dual leadless moulded packages (μDLMP) in pro-engineer and conduct the performance analysis using the finite element software ANSYS™. Reliability plays a major role at every stage in the manufacturing, testing and use of integrated circuit packages. The influence of operating voltages and joule heating on the mechanical reliability of ICs was also investigated. Die shear tests were conducted on the ICs and the shear strength compared with the values obtained from the finite element results. Thermal tests were carried out on the ICs that were later inspected under a scanning acoustic microscope (SAM) for delaminations arising from hygrothermal stresses. Finally, the results of the electro-hygrothermo-mechanical analyses were analysed and presented at the maximum operating temperature (MOT) that highlight the overall static reliability of the ICs with acceptable factors of safety.

A Multiphysics Based Finite Element Approach to Evaluate the Reliability of IC Packages

Abstract: The aim of this book chapter is to generate 3D models of different Thin Dual or Quad Leadless Moulded IC packages and conduct multiphysics based finite element analyses to evaluate the static reliability of IC packages. The performance analyses using die shear, thermal experiments and finite element analysis were conceived and conducted to evaluate the reliability of these packages. Reliability plays a major role at every stage in the manufacturing, testing and use of integrated circuit packages. The coupled influence of operating voltages and joule heating on the mechanical reliability of ICs is discussed here. Die shear tests were conducted on the ICs and the shear strength compared with the values obtained from the finite element results. Thermal tests were carried out on the ICs that were later inspected under a Scanning Acoustic Microscope (SAM) for delaminations arising from hygrothermal stresses. Finally the results of the electro-hygrothermo-mechanical analyses were analyzed and presented at the maximum operating temperature (MOT) that highlight the overall static reliability of the ICs with acceptable factors of safety. The main objective of this investigation is the construction of the failure envelopes through determination of the maximum operating temperatures and test temperatures of the ICs that aid in the evaluation of the overall static reliability of the ICs.