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Author

K. Palanisamy

Bio: K. Palanisamy is an academic researcher from VIT University. The author has contributed to research in topics: Topology (electrical circuits) & Solar inverter. The author has co-authored 1 publications.

Papers
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Book ChapterDOI
01 Jan 2021
TL;DR: In this paper, a new topology of type three level inverter with easy implementation is discussed, which has many advantages like lesser part count compared to other three level topologies, the better harmonic profile for the output voltage, etc.
Abstract: Multilevel inverters are the main components in grid-connected solar applications. Various topologies of multilevel inverters are proposed for getting more levels in the output waveforms, thereby reducing the filter requirements. Several topologies of multilevel inverters are being developed for this purpose. This paper contains that a new topology of type three level inverter with easy implementation is discussed. This topology has many advantages like lesser part count compared to other three-level topologies, the better harmonic profile for the output voltage, etc. for better utilization the space vector modulation technique link space of DC schemes is widely used in inverters. In case of three-level inverters, use of space vector modulation is not feasible as computation time is a lot taken by it. Sine PWM is the widely accepted carrier-based PWM method, it has failed to utilize the available DC-link voltage efficiently. This paper describes the implementation and performance of two modified carrier-based PWM techniques that can be used as a replacement for space vector modulation. The two cases are simulated in MATLAB Simulink, and hardware results are obtained in a three-level 25 kW solar inverter.