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Author

K. Srivatsan

Bio: K. Srivatsan is an academic researcher from VIT University. The author has contributed to research in topics: Transformation (function) & Pseudorandom number generator. The author has an hindex of 1, co-authored 1 publications receiving 1 citations.

Papers
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Proceedings ArticleDOI
01 Mar 2017
TL;DR: A pair of 32 bit Gaussian Random Numbers (GRaNs) is generated for the generation of uniform random number skip-ahead linear feedback shift register (SA-LFSR) which is given as input to BM transformation.
Abstract: A pair of 32 bit Gaussian Random Numbers (GRaNs) is generated. Box Muller (BM) transformation is widely used for generation of high quality Gaussian Random Numbers in hardware. The BM transformation is a direct method to convert random numbers into a Gaussian random numbers. For the generation of uniform random number skip-ahead linear feedback shift register (SA-LFSR) is used which is given as input to BM transformation. CORDIC algorithm is used for the hardware design of BM transformation. The SA-LFSR does not suffer from correlations since they skip n number of bits at every sample.

1 citations


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Journal ArticleDOI
26 Jul 2021
TL;DR: In this article, a transmitter identification scheme consisting of a lightweight Bayesian neural network (BNN)-based classifier using raw time-domain data is presented, which is performed with data obtained in schematic-level simulation of high-efficiency CMOS power amplifier designs using a 65 nm process design kit.
Abstract: The edge devices in an emerging Internet-of-Things (IoT) environment require comprehensive security measures that are within the power budget for ubiquitous computing. In this paper, a transmitter identification scheme consisting of a lightweight Bayesian neural network (BNN)-based classifier using raw time-domain data is presented. Evaluation is performed with data obtained in schematic-level simulation of high-efficiency CMOS power amplifier designs using a 65 nm process design kit (PDK). The Bayesian neural networks achieve 89.5% accuracy on the task of classifying six transmitters. Moreover, the BNN classifier is implemented on field-programmable gate array (FPGA) with parallel pseudo-Gaussian random number generators to achieve a throughput of more than 340,000 classifications per second, with average energy consumption for each classification task of $0.548~\mu J$ . This low-power system enables comprehensive security for energy-constrained IoT devices and sensors.

7 citations