K
Ka Nang Leung
Researcher at The Chinese University of Hong Kong
Publications - 145
Citations - 5233
Ka Nang Leung is an academic researcher from The Chinese University of Hong Kong. The author has contributed to research in topics: CMOS & Low-dropout regulator. The author has an hindex of 31, co-authored 139 publications receiving 4782 citations. Previous affiliations of Ka Nang Leung include University of Hong Kong & Hong Kong University of Science and Technology.
Papers
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Journal ArticleDOI
A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation
Ka Nang Leung,Philip K. T. Mok +1 more
TL;DR: In this paper, a 1.5-V 100-mA capacitor-free CMOS low-dropout regulator (LDO) for system-on-chip applications to reduce board space and external pins is presented.
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A sub-1-V 15-ppm//spl deg/C CMOS bandgap voltage reference without requiring low threshold voltage device
Ka Nang Leung,Philip K. T. Mok +1 more
TL;DR: In this paper, a sub-1V bandgap voltage reference with no low threshold voltage device is introduced, where the minimum supply voltage of the proposed voltage reference is 0.98 V at 0/spl deg/C and the maximum supply current is 18 /spl mu/A.
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Analysis of multistage amplifier-frequency compensation
Ka Nang Leung,Philip K. T. Mok +1 more
TL;DR: Frequency-compensation techniques of single-, two- and three-stage amplifiers based on Miller pole splitting and pole-zero cancellation are re-analyzed and several proposed methods to improve the published topologies are given.
Journal ArticleDOI
An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection
Pui Ying Or,Ka Nang Leung +1 more
TL;DR: An output-capacitorless low-dropout regulator (LDO) with a direct voltage-spike detection circuit is presented in this paper and the transient response of the LDO is significantly enhanced due to the improvement of the slew rate at the gate of the power transistor.
Journal ArticleDOI
A 6- $\mu$ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology
Jianping Guo,Ka Nang Leung +1 more
TL;DR: Experimental result verifies that the proposed LDO is stable for a capacitive load from 0 to 50 pF and with load capability of 100 mA and the gain-enhanced structure provides sufficient loop gain to improve line regulation and load regulation.