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Kenneth C. Marston

Bio: Kenneth C. Marston is an academic researcher from IBM. The author has contributed to research in topics: Microchannel & Computer cooling. The author has an hindex of 15, co-authored 25 publications receiving 950 citations.

Papers
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Journal ArticleDOI
TL;DR: In this paper, the authors describe a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors, which is able to cool chips with average power densities of 400W/cm2 or more.
Abstract: This paper describes a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors. Through the use of multiple heat exchanger zones and optimized cooler fin designs, a unit thermal resistance 10.5 C-mm2 /W from the cooler surface to the inlet water was demonstrated with a fluid pressure drop of <35kPa. Further, cooling of a thermal test chip with a microchannel cooler bonded to it packaged in a single chip module was also demonstrated for a chip power density greater than 300W/cm2. Coolers of this design should be able to cool chips with average power densities of 400W/cm2 or more

208 citations

Proceedings ArticleDOI
15 Mar 2005
TL;DR: In this article, the authors describe a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors, achieving a unit thermal resistance of 10.5 C-mm/sup 2/W from the cooler surface to the inlet water with a fluid pressure drop of less than 35 kPa.
Abstract: The paper describes a practical implementation of a single-phase Si microchannel cooler designed for cooling very high power chips such as microprocessors. Through the use of multiple heat exchanger zones and optimized cooler fin designs, a unit thermal resistance of 10.5 C-mm/sup 2//W from the cooler surface to the inlet water was demonstrated with a fluid pressure drop of less than 35 kPa. Further, cooling of a thermal test chip with a microchannel cooler bonded to it packaged in a single chip module was also demonstrated for a chip power density greater than 300 W/cm/sup 2/. Coolers of this design should be able to cool chips with average power densities of 400 W/cm/sup 2/ or more.

202 citations

Proceedings ArticleDOI
21 Mar 2010
TL;DR: The optical interconnect for POWER7-IH systems provides high-BW, low-latency connectivity for 100,000s of high-performance CPU cores by leveraging dense transceiver and connector technologies to construct chip module optical IOs.
Abstract: We report the optical interconnect for POWER7-IH systems, which provides high-BW, low-latency connectivity for 100,000s of high-performance CPU cores by leveraging dense transceiver and connector technologies to construct chip module optical IOs.

97 citations

Journal ArticleDOI
TL;DR: In this paper, a single-phase Si microchannel coolers were designed and characterized in single chip modules in a laboratory environment using either water at 22°C or a fluorinated fluid at temperatures between 20 and -40°C as the coolant.
Abstract: High performance single-phase Si microchannel coolers have been designed and characterized in single chip modules in a laboratory environment using either water at 22°C or a fluorinated fluid at temperatures between 20 and -40° C as the coolant. Compared to our previous work, key performance improvements were achieved through reduced channel pitch (from 75 to 60 microns), thinned channel bases (from 425 to 200 microns of Si), improved thermal interface materials, and a thinned thermal test chip (from 725 to 400 microns of Si). With multiple heat exchanger zones and 60 micron pitch microchannels with a water flow rate of 1.25 1pm, an average unit thermal resistance of 15.9 C mm 2 /W between the chip surface and the inlet cooling water was demonstrated for a Si microchannel cooler attached to a chip with Ag epoxy. Replacing the Ag epoxy layer with an In solder layer reduced the unit thermal resistance to 12.0 C mm 2 /W. Using a fluorinated fluid with an inlet temperature of -30°C and 60 micron pitch microchannels with an Ag epoxy thermal interface layer, the average unit thermal resistance was 25.6 C mm 2 /W. This fell to 22.6 C mm 2 /W with an In thermal interface layer. Cooling >500 W/cm 2 was demonstrated with water. Using a fluorinated fluid with an inlet temperature of -30° C, a chip with a power density of 270 W/cm 2 was cooled to an average chip surface temperature of 35°C. Results using both water and a fluorinated fluid are presented for a range of Si microchannel designs with a channel pitch from 60 to 100 microns.

64 citations

Patent
22 Jul 2008
TL;DR: In this paper, an apparatus to reduce a thermal penalty of a 3D die stack for use in a computing environment is provided and includes a substrate installed within the computing environment, a first component to perform operations of the computing environments, which is coupled to the substrate in a stacking direction.
Abstract: An apparatus to reduce a thermal penalty of a three-dimensional (3D) die stack for use in a computing environment is provided and includes a substrate installed within the computing environment, a first component to perform operations of the computing environment, which is coupled to the substrate in a stacking direction, a set of second components to perform operations of the computing environment, each of which is coupled to the first component and segmented with respect to one another to form a vacated region, a thermal interface material (TIM) disposed on exposed surfaces of the first and second components, and a lid, including a protrusion, coupled to the substrate to overlay the first and second components such that the protrusion extends into the vacated region and such that surfaces of the lid and the protrusion thermally communicate with the first and second components via the TIM.

52 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Journal ArticleDOI
TL;DR: In this article, the authors show that the enhancement in the effective thermal conductivity of nanofluids is due mainly to localized convection caused by the Brownian movement of the nanoparticles.
Abstract: Here we show through an order-of-magnitude analysis that the enhancement in the effective thermal conductivity of nanofluids is due mainly to the localized convection caused by the Brownian movement of the nanoparticles. We also introduce a convective-conductive model which accurately captures the effects of particle size, choice of base liquid, thermal interfacial resistance between the particles and liquid, temperature, etc. This model is a combination of the Maxwell-Garnett (MG) conduction model and the convection caused by the Brownian movement of the nanoparficles, and reduces to the MG model for large particle sizes. The model is in good agreement with data on water, ethylene glycol, and oil-based nanofluids, and shows that the lighter the nanoparticles, the greater the convection effect in the liquid, regardless of the thermal conductivity of the nanoparticles.

512 citations

Journal ArticleDOI
TL;DR: In this paper, a literature review is presented to compare different cooling technologies currently in development in research laboratories that are competing to solve the challenge of cooling the next generation of high heat flux computer chips.
Abstract: The purpose of this literature review is to compare different cooling technologies currently in development in research laboratories that are competing to solve the challenge of cooling the next generation of high heat flux computer chips. Today, most development efforts are focused on three technologies: liquid cooling in copper or silicon micro-geometry heat dissipation elements, impingement of liquid jets directly on the silicon surface of the chip, and two-phase flow boiling in copper heat dissipation elements or plates with numerous microchannels. The principal challenge is to dissipate the high heat fluxes (current objective is 300 W/cm2) while maintaining the chip temperature below the targeted temperature of 85°C, while of second importance is how to predict the heat transfer coefficients and pressure drops of the cooling process. In this study, the state of the art of these three technologies from recent experimental articles (since 2003) is analyzed and a comparison of the respective merits and ...

511 citations

Journal ArticleDOI
TL;DR: In this paper, a critical review of traditional and emerging cooling methods as well as coolants for electronics is provided, summarizing traditional coolants, heat transfer properties and performances of potential new coolants such as nanofluids are also reviewed and analyzed.
Abstract: Continued miniaturization and demand for high-end performance of electronic devices and appliances have led to dramatic increase in their heat flux generation. Consequently, conventional coolants and cooling approaches are increasingly falling short in meeting the ever-increasing cooling needs and challenges of those high heat generating electronic devices. This study provides a critical review of traditional and emerging cooling methods as well as coolants for electronics. In addition to summarizing traditional coolants, heat transfer properties and performances of potential new coolants such as nanofluids are also reviewed and analyzed. With superior thermal properties and numerous benefits nanofluids show great promises in fulfilling the cooling demands of high heat generating electronic devices. It is believed that applications of such novel coolants in emerging techniques like micro-channels and micro-heat pipes can revolutionize cooling technologies for electronics in the future.

441 citations

Journal ArticleDOI
09 Sep 2020-Nature
TL;DR: By removing the need for large external heat sinks, this approach should enable the realization of very compact power converters integrated on a single chip, potentially extending Moore's law and greatly reducing the energy consumption in cooling of electronics.
Abstract: Thermal management is one of the main challenges for the future of electronics1–5. With the ever-increasing rate of data generation and communication, as well as the constant push to reduce the size and costs of industrial converter systems, the power density of electronics has risen6. Consequently, cooling, with its enormous energy and water consumption, has an increasingly large environmental impact7,8, and new technologies are needed to extract the heat in a more sustainable way—that is, requiring less water and energy9. Embedding liquid cooling directly inside the chip is a promising approach for more efficient thermal management5,10,11. However, even in state-of-the-art approaches, the electronics and cooling are treated separately, leaving the full energy-saving potential of embedded cooling untapped. Here we show that by co-designing microfluidics and electronics within the same semiconductor substrate we can produce a monolithically integrated manifold microchannel cooling structure with efficiency beyond what is currently available. Our results show that heat fluxes exceeding 1.7 kilowatts per square centimetre can be extracted using only 0.57 watts per square centimetre of pumping power. We observed an unprecedented coefficient of performance (exceeding 10,000) for single-phase water-cooling of heat fluxes exceeding 1 kilowatt per square centimetre, corresponding to a 50-fold increase compared to straight microchannels, as well as a very high average Nusselt number of 16. The proposed cooling technology should enable further miniaturization of electronics, potentially extending Moore’s law and greatly reducing the energy consumption in cooling of electronics. Furthermore, by removing the need for large external heat sinks, this approach should enable the realization of very compact power converters integrated on a single chip. Cooling efficiency is greatly increased by directly embedding liquid cooling into electronic chips, using microfluidics-based heat sinks that are designed in conjunction with the electronics within the same semiconductor substrate.

330 citations