Kenneth P. Rodbell

Bio: Kenneth P. Rodbell is an academic researcher from IBM. The author has contributed to research in topics: Electromigration & Texture (crystalline). The author has an hindex of 35, co-authored 221 publications receiving 5475 citations. Previous affiliations of Kenneth P. Rodbell include Analytical Services & GlobalFoundries.

Measurement of the flux and energy spectrum of cosmic-ray induced neutrons on the ground

Abstract: New ground-based measurements of the cosmic-ray induced neutron flux and its energy distribution have been made at several locations across the United States using an extended-energy Bonner sphere spectrometer. The data cover over twelve decades of neutron energy, from meV to GeV. An expression to scale the flux to other locations has been developed from a fit to the altitude dependence of our measurements and an expression from the literature for the geomagnetic and solar-activity dependence of neutron monitor rates. In addition, an analytic expression is provided which fits the neutron spectrum above about 0.4 MeV. The neutron flux is important for estimating the soft-error rate in computer memories and recent computer logic devices.

Copper Metallization for High Performance Silicon Technology

Abstract: ▪ Abstract The increasingly rapid transition of the electronics industry to high-density, high-performance multifunctional microprocessor Si technology has precipitated migration to new materials alternatives that can satisfy stringent requirements. One of the recent innovations has been the substitution of copper for the standard aluminum-copper metal wiring in order to decrease resistance and tailor RC delay losses in the various hierarchies of the wiring network. This has been accomplished and the product shipped only since the fall of 1998, after more than a decade of intensive development. Critical fabrication innovations include the development of an electroplating process for the copper network, dual-damascence chem-mech polishing (CMP), and effective liner material for copper diffusion barrier and adhesion promotion. The present copper technology provides improved current-carrying capability by higher resistance to electromigration, no device contamination by copper migration, and the performance ...

Mechanisms for microstructure evolution in electroplated copper thin films near room temperature

Abstract: We present a model which accounts for the dramatic evolution in the microstructure of electroplated copper thin films near room temperature. Microstructure evolution occurs during a transient period of hours following deposition, and includes an increase in grain size, changes in preferred crystallographic texture, and decreases in resistivity, hardness, and compressive stress. The model is based on grain boundary energy in the fine-grained as-deposited films providing the underlying energy density which drives abnormal grain growth. As the grain size increases from the as-deposited value of 0.05–0.1 μm up to several microns, the model predicts a decreasing grain boundary contribution to electron scattering which allows the resistivity to decrease by tens of a percent to near-bulk values, as is observed. Concurrently, as the volume of the dilute grain boundary regions decreases, the stress is shown to change in the tensile direction by tens of a mega pascal, consistent with the measured values. The small ...

Method of chemical-mechanical polishing an electronic component substrate and polishing slurry therefor

Abstract: Disclosed is a method of chem-mech polishing an article, preferably an electronic component substrate. The method includes the following steps; obtaining an article having at least two features thereon or therein which have a different etch rate with respect to a particular etchant; and contacting the article with a polishing pad while contacting the substrate with a slurry containing the etchant wherein the slurry includes abrasive particles wherein the abrasive particles do not include alumina, a transition metal chelated salt, a solvent for the salt, and a small but effective amount of alumina. The chem-mech polishing causes the at least two features to be substantially coplanar. Also disclosed is the chem-mech polishing slurry.

Low-Energy Proton-Induced Single-Event-Upsets in 65 nm Node, Silicon-on-Insulator, Latches and Memory Cells

Abstract: Experimental data are presented showing that low energy (<2 MeV) proton irradiation can upset exploratory 65 nm node, silicon-on-insulator circuits. Alpha particle SER data, modeling and simulation results provide a plausible mechanism. This work suggests that track structures need to be understood and effectively modeled, especially for small, modern devices.

Semiconductor device, and manufacturing method thereof

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Microstructural evolution during film growth

Abstract: Atomic-scale control and manipulation of the microstructure of polycrystalline thin films during kinetically limited low-temperature deposition, crucial for a broad range of industrial applications, has been a leading goal of materials science during the past decades. Here, we review the present understanding of film growth processes—nucleation, coalescence, competitive grain growth, and recrystallization—and their role in microstructural evolution as a function of deposition variables including temperature, the presence of reactive species, and the use of low-energy ion irradiation during growth.

Low dielectric constant materials for microelectronics

Abstract: The ever increasing requirements for electrical performance of on-chip wiring has driven three major technological advances in recent years. First, copper has replaced Aluminum as the new interconnect metal of choice, forcing also the introduction of damascene processing. Second, alternatives for SiO2 with a lower dielectric constant are being developed and introduced in main stream processing. The many new resulting materials needs to be classified in terms of their materials characteristics, evaluated in terms of their properties, and tested for process compatibility. Third, in an attempt to lower the dielectric constant even more, porosity is being introduced into these new materials. The study of processes such as plasma interactions and swelling in liquid media now becomes critical. Furthermore, pore sealing and the deposition of a thin continuous copper diffusion barrier on a porous dielectric are of prime importance. This review is an attempt to give an overview of the classification, the character...

Radiation-induced soft errors in advanced semiconductor technologies

Abstract: The once-ephemeral radiation-induced soft error has become a key threat to advanced commercial electronic components and systems. Left unchallenged, soft errors have the potential for inducing the highest failure rate of all other reliability mechanisms combined. This article briefly reviews the types of failure modes for soft errors, the three dominant radiation mechanisms responsible for creating soft errors in terrestrial applications, and how these soft errors are generated by the collection of radiation-induced charge. The soft error sensitivity as a function of technology scaling for various memory and logic components is then presented with a consideration of which applications are most likely to require soft error mitigation.

A buckling-based metrology for measuring the elastic moduli of polymeric thin films

Abstract: As technology continues towards smaller, thinner and lighter devices, more stringent demands are placed on thin polymer films as diffusion barriers, dielectric coatings, electronic packaging and so on. Therefore, there is a growing need for testing platforms to rapidly determine the mechanical properties of thin polymer films and coatings. We introduce here an elegant, efficient measurement method that yields the elastic moduli of nanoscale polymer films in a rapid and quantitative manner without the need for expensive equipment or material-specific modelling. The technique exploits a buckling instability that occurs in bilayers consisting of a stiff, thin film coated onto a relatively soft, thick substrate. Using the spacing of these highly periodic wrinkles, we calculate the film's elastic modulus by applying well-established buckling mechanics. We successfully apply this new measurement platform to several systems displaying a wide range of thicknessess (nanometre to micrometre) and moduli (MPa to GPa).