Ki Wook Jung

Bio: Ki Wook Jung is an academic researcher from Stanford University. The author has contributed to research in topics: Microchannel & Pressure drop. The author has an hindex of 7, co-authored 24 publications receiving 154 citations. Previous affiliations of Ki Wook Jung include Seoul National University.

Microchannel cooling strategies for high heat flux (1 kW/cm 2 ) power electronic applications

Abstract: The wide band-gap (WBG) semiconductor electronics such as silicon carbide (SiC) and gallium nitride (GaN) are becoming more popular in power electronics applications due to their excellent functionality at higher operating temperatures, powers, frequencies and in high radiation environments compared to Si devices. However, the continued drive for higher device and packaging densities has led to extreme heat fluxes on the order of 1 kW/cm2 that requires aggressive microchannel cooling strategies in order to maintain the device junction temperature below acceptable limits. A reduced order single/two phase thermal-fluidic model is developed to investigate the effect of micro-channel geometry parameters, packaging materials and fluid flow conditions on the cooling performance of various cooling strategies. Water and R245fa refrigerant are used as single- and two-phase working fluids, respectively. We consider three cooling strategies: • Design A: copper cold-plate micro-channel module bonded to the device substrate • Design B: embedded micro-channels directly etched into the device substrate and • Design C: embedded micro-channels with a 3D manifold with inlet and outlet module. The proposed embedded micro-channels with 3D-manifold with R245fa working fluid has the potential to achieve the lowest thermal resistance ∼0.07 K/W and pressure drop ∼10 kPa for flow rate Q ∼ 0.21 l/min (T in = 90 °C) and exit quality x = 0.44.

Co-designing electronics with microfluidics for more sustainable cooling.

Abstract: Thermal management is one of the main challenges for the future of electronics1–5. With the ever-increasing rate of data generation and communication, as well as the constant push to reduce the size and costs of industrial converter systems, the power density of electronics has risen6. Consequently, cooling, with its enormous energy and water consumption, has an increasingly large environmental impact7,8, and new technologies are needed to extract the heat in a more sustainable way—that is, requiring less water and energy9. Embedding liquid cooling directly inside the chip is a promising approach for more efficient thermal management5,10,11. However, even in state-of-the-art approaches, the electronics and cooling are treated separately, leaving the full energy-saving potential of embedded cooling untapped. Here we show that by co-designing microfluidics and electronics within the same semiconductor substrate we can produce a monolithically integrated manifold microchannel cooling structure with efficiency beyond what is currently available. Our results show that heat fluxes exceeding 1.7 kilowatts per square centimetre can be extracted using only 0.57 watts per square centimetre of pumping power. We observed an unprecedented coefficient of performance (exceeding 10,000) for single-phase water-cooling of heat fluxes exceeding 1 kilowatt per square centimetre, corresponding to a 50-fold increase compared to straight microchannels, as well as a very high average Nusselt number of 16. The proposed cooling technology should enable further miniaturization of electronics, potentially extending Moore’s law and greatly reducing the energy consumption in cooling of electronics. Furthermore, by removing the need for large external heat sinks, this approach should enable the realization of very compact power converters integrated on a single chip. Cooling efficiency is greatly increased by directly embedding liquid cooling into electronic chips, using microfluidics-based heat sinks that are designed in conjunction with the electronics within the same semiconductor substrate.

Experimental Investigation of Micro HeatPipes Fabricated in Silicon Wafers

Abstract: An experimental investigation was conducted to determine the thermal behavior of arrays of micro heat pipes fabricated in silicon wafers. Two types of micro heat pipe arrays were evaluated, one that utilized machined rectangular channels and the other that used an anisotropic etching process to produce triangular channels. Once fabricated, a clear pyrex cover plate was bonded to the top surface of each wafer using an ultraviolet bonding technique to form the micro heat pipe array. These micro heat pipe arrays were then evacuated and charged with a predetermined amount of methanol. Using an infrared thermal imaging unit, the temperature gradients and maximum localized temperatures were measured and an effective thermal conductivity was computed. The experimental results were compared with those obtained for a plain silicon wafer

Next generation electric drives for HEV/EV propulsion systems: Technology, trends and challenges

Abstract: In recent decades, several factors such as environmental protection, fossil fuel scarcity, climate change and pollution have driven the research and development of a more clean and sustainable transport. In this context, several agencies and associations, such as the European Union H2020, the United States Council for Automotive Research (USCAR) and the United Nations Economic and Social Commission for Asia (UN ESCAP) have defined a set of quantitative and qualitative goals in terms of efficiency, reliability, power losses, power density and economical costs to be met by next generation hybrid and full electric vehicle (HEV/EV) drive systems. As a consequence, the automotive electric drives (which consists of the electric machine, power converter and their cooling systems) of future vehicles have to overcome a number of technological challenges in order to comply with the aforementioned technical objectives. In this context, this paper presents, for each component of the electric drive, a comprehensive review of the state of the art, current technologies, future trends and enabling technologies that will make possible next generation HEV/EVs.

The N3XT Approach to Energy-Efficient Abundant-Data Computing

Abstract: The world’s appetite for analyzing massive amounts of structured and unstructured data has grown dramatically. The computational demands of these abundant-data applications, such as deep learning, far exceed the capabilities of today’s computing systems and are unlikely to be met with isolated improvements in transistor or memory technologies, or integrated circuit architectures alone. To achieve unprecedented functionality, speed, and energy efficiency, one must create transformative nanosystems whose architectures are based on the salient properties of the underlying nanotechnologies. Our Nano-Engineered Computing Systems Technology (N3XT) approach makes such nanosystems possible through new computing system architectures leveraging emerging device (logic and memory) nanotechnologies and their dense 3-D integration with fine-grained connectivity to immerse computing in memory and new logic devices (such as carbon nanotube field-effect transistors for implementing high-speed and low-energy logic circuits) as well as high-density nonvolatile memory (such as resistive memory), and amenable to ultradense (monolithic) 3-D integration of thin layers of logic and memory devices that are fabricated at low temperature. In addition, we explore the use of several device and integration technologies in the N3XT beyond the specific ones mentioned earlier that are also used in our main nanosystem prototypes. We also present an efficient resiliency technique to overcome endurance challenges in certain resistive memory technologies. N3XT hardware prototypes demonstrate the practicality of our architectures. We evaluate the benefits of the N3XT using a simulation framework calibrated using experimental measurements. System-level energy-delay product of common implementations of abundant-data workloads improves by three orders of magnitude in the N3XT compared with conventional architectures. These improvements impact a broad range of application workloads and architecture configurations, from embedded systems to the cloud.