Kok Meng Lim

Bio: Kok Meng Lim is an academic researcher from Nanyang Technological University. The author has contributed to research in topics: Amplifier & Frequency mixer. The author has an hindex of 3, co-authored 12 publications receiving 29 citations. Previous affiliations of Kok Meng Lim include Cadence Design Systems.

Multiple-mode filter for radio frequency integrated circuits

Abstract: A fully integrated silicon-based bandpass filter which lends itself to applications in the gigahertz region is disclosed. The bandpass filter is fabricated on an integrated circuit and operates as a microwave/millimeter-wave filtering circuit. In accordance with one aspect, the bandpass filter includes a first set and a second set of filter coupled elements, a three-port “T” transmission line junction and a perturbing element. The three-port “T” transmission line junction has a first port coupled to a first end of a first one of the first set of filter coupled elements and a second port coupled to a first end of a first one of the second set of filter coupled elements. The perturbing element is coupled to a third port of the three-port “T” transmission line junction. A second one of the first set of filter coupled elements includes an input transmission line and has a first end thereof coupled to an input port and an opposite end thereof having an open end. A second one of the second set of filter coupled elements includes an output transmission line and has a first end thereof coupled to an output port and an opposite end thereof having an open end.

Novel RF process monitoring test structure for silicon devices

Abstract: This paper demonstrates a novel RFCMOS process monitoring test structure. Outstanding agreement in dc and radio frequency (RF) characteristics has been observed between conventional test structure and the new process monitoring test structure for MOSFET with good correlations in measured capacitances also noted for metal-insulator-metal capacitor and MOS varactor. Possible process monitoring test structure is also suggested as a reference benchmarking indicator for interconnects.

A DC to 4 GHz fully differential wideband digitally controlled Variable Gain Amplifier

Abstract: A Variable Gain and Attenuation control Amplifier (VGA) operating with low power, wide bandwidth and large Gain range for interfacing 60GHz RF front-end to Digital Baseband processor has been designed in 180nm SiGe BiCMOS technology from Jazz Semiconductor. The VGA is implemented using two stage amplifier followed by a Buffer stage with additional Diode linearizer for improving the input referred 1dB compression point. The performance parameters of the proposed VGA is been simulated and achieves a Gain range of −10dB to +10dB with 3-dB Bandwidth of greater than 4GHz. This VGA topology has good input and output matching. The complete circuit consumes about 9mW power from a DC 1.8V supply and the Core circuit (excluding I/O Pads) occupies a chip area of 170µm × 60µm.

A CMOS low-power receiving signal strength indicator using weak-inversion limiting amplifiers

Abstract: Receiving signal strength indicator (RSSI) has been widely used in wireless receiver communication systems such as wireless local personal networks (eg Bluetooth), wireless local area networks (eg WLAN 80211a, b, g, j, n), cellular networks (eg GSM, UMTS), digital broadcasting (eg DAB, DVB-TH), and positioning systems (eg GPS) [1–3] The RSSI is normally employed to represent the received signal power strength It can also be used to adjust the gains of the RF front-end, analog baseband, and power down the receiver when there is no signal

A double-quadrature down-conversion mixer in 0.18 μm SiGe BiCMOS process

Abstract: This paper presents a low power double-quadrature down-conversion mixer for second stage down-conversion application in the 60 GHz receiver chain. The mixer utilizes double-balanced Gilbert-cell topology, and operates over a wide RF bandwidth of 7 GHz centered at 15 GHz, with a LO bandwidth of 4 GHz centered at 12.5 GHz. With low LO drive power requirement of −8dBm, the mixer realizes a conversion gain of 2 dB with a 1 dB flatness across an IF bandwidth of 2.9 GHz. It also has good spurious rejection of more than 40 dBc. The mixer consumes 7.11 mA from a 1.8 V supply, and is fabricated using Tower Jazz's 0.18 μm SiGe BiCMOS process.

Compact light sensor

Abstract: Provided are methods and systems for concurrent imaging at multiple wavelengths. In one aspect, a hyperspectral/multispectral imaging device includes a lens configured to receive light backscattered by an object, a plurality of photo-sensors, a plurality of bandpass filters covering respective photo-sensors, where each bandpass filter is configured to allow a different respective spectral band to pass through the filter, and a plurality of beam splitters in optical communication with the lens and the photo-sensors, where each beam splitter splits the light received by the lens into a plurality of optical paths, each path configured to direct light to a corresponding photo-sensor through the bandpass filter corresponding to the respective photo-sensor.

A 7.9-mW 5.6-GHz Digitally Controlled Variable Gain Amplifier With Linearization

Abstract: This paper presents the design and validation of a compact high-performance digitally controlled variable-gain amplifier (DVGA). By using MOS switches and a linearizer, the designed DVGA demonstrates high linearity and gain flatness over a wide gain control range. The 6-bit DVGA is designed in a commercial 0.18-μm SiGe BiCMOS technology achieving a variable gain range from -16.5 to +6.5 dB, a 3-dB bandwidth from dc to 5.6 GHz, a ± 0.75-dB gain flatness from dc to 4 GHz, both input and output return loss greater than 15 dB, consuming 7.9 mW over the entire gain control range, and has a core circuit area of 170μm×60μm.

Systems and methods for performing an imaging test under constrained conditions

Abstract: An imaging system collects a plurality of images of an extremity of a subject, each collected at a unique spectral band. A physiologic arterial parameter of the extremity is determined from the plurality of images upon image registration. A record of the physiological arterial parameter is recorded in an electronic data store and an indication of the parameter is outputted. The method is performed by a medical professional associated with a temporal clinical expenditure cost in an epoch, for an entity. The product of the (i) epoch and the (ii) temporal clinical expenditure cost is less than a difference between (a) an average or absolute reimbursement associated with the current procedural terminology code by the entity and (b) incidental expenditures associated with the performance of the method.

CMOS Programmable Gain Distributed Amplifier With 0.5-dB Gain Steps

Abstract: A new CMOS programmable gain distributed amplifier with 0.5-dB gain steps is fabricated in a 130-nm process. The circuit is designed to demonstrate broadband (>;1 decade) programmable gains with excellent matching and high isolation for use in RF integrated-circuit testing. The measured slope of S21 loss is approximately 3 dB/decade over frequencies from 0.8 to 9 GHz where input and output return losses are better than roughly 10 dB; the measured input 1-dB compression point and third-order intermodulation intercept point at 2.78 GHz for the maximum 2.5-dB gain is 1 and 12.5 dBm, respectively. The measured noise figure is below 9.5 dB at 9 GHz. The circuit consumes approximately 40 mW total from 3.1-V analog and 1.5-V digital supplies.

Modeling and Layout Optimization of Differential Inductors for Silicon-Based RFIC Applications

Abstract: A scalable RF differential inductor model has been developed, enabling device performance versus layout size tradeoffs and optimization as well as accurate circuit predictions. Comparing inductors with identical inductance values up to an operating frequency of 10 GHz, large conductor width designs are found to yield good performance for inductors with small inductance values. As differential inductance or operating frequency increases, interactions between metallization resistive and substrate losses discourage the use of large widths as it consumes silicon area and degrades device performance.