In general, the antielectrostatic discharge (ESD) ability of a high voltage (HV) MOSFET device will be very low if it is not optimized through the addition of reliability engineering. Accordingly, in this paper, some embedded superjunction (SJ) device under tests (DUTs) of 45-V HV n-channel lateral-diffused MOS (nLDMOS) are developed, which offer a low on-resistance as compared with the traditional nLDMOS due to the redistribution of electric field or/and higher doping density in the drain side. In order to evaluate how various physical parameters affect the anti-ESD capability, these DUTs will change the widths and shapes of the P/N pillars. From the testing results, it can be found that the I
 t2
 values of SJ-nLDMOS DUTs will be higher than that of a traditional nLDMOS, while the equivalent immunity level is even greater than HBM 10 kV. In this paper, the I
 t2
 values of developed SJ-nLDMOS DUTs were increased at least by 109%, 31%, and 159% over that of the traditional nLDMOS for the Types 1-3 embedded SJ, respectively. Moreover, in some geometry architectures of an SJ-LDMOS, the holding voltage can be greater than the traditional nLDMOS. Therefore, by considering the relationships between these three kinds of SJ-nLDMOS DUTs and the I
 t2
 values, it can be determined that the SJ structure is good for ESD/latch-up immunities especially for the ESD reliability.

Strengthen Anti-ESD Characteristics in an HV LDMOS With Superjunction Structures

The threshold voltage of insulated gate power transistors usually is around 3 to 4V and their nominal gate to source voltage between 15 and 20V. These unanimously recognized electrical characteristics are questioned in this paper in order to evaluate which benefits could be drawn from a reduction of the threshold voltage of power transistors. Logic level MOSFETs already exist, but this paper chooses to study theoretically the electrical and physical characteristics of power transistors as a function of the threshold voltage to see if these electrical values of power electronics standards are still appropriate. It appears that the reduction of the threshold voltage of power MOSFET reduces the amount of control power and may improve switching characteristics.

Towards reduced threshold voltages for vertical power Mosfet transistors

Using the super-junction theory we develop an analytical design methodology for high voltage Super-junction power MOSFET, which offers very low on resistance as compared with VDMOS power device due to higher doping density in the drift region. This method is used to analytically design various rating super-junction power MOSFET and using simulation tools, the validity of this method is established and then used to study the physical mechanisms underlying the device operation.

Kondekar Pravin N

Papers

Analytical Design and Simulation Studies of Super-junction Power MOSFET