An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The present invention comprises a semiconductor package comprising a bottom semiconductor package substrate which is populated with one or more electronic components. The electronic component(s) of the bottom substrate are covered or encapsulated with a suitable mold compound which hardens into a package body of the semiconductor package. The package body is provided with one or more vias through the completion of laser drilling process, such via(s) providing access to one or more corresponding conductive contacts of the bottom substrate. These vias are either lined or partially filled with a conductive metal material. Subsequently, a top semiconductor package substrate (which may optionally be populated with one or more electronic components) is mounted to the package body and electrically connected to the conductive metal within the via(s) of the package body.

Thin stacked interposer package

A lead frame for making a semiconductor package is disclosed. The leadframe's leads include a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate, thereby effectively preventing a separation of the inner lead from occurring in a singulation process involved in the fabrication of the semiconductor package. A semiconductor package fabricated using the lead frame and a fabrication method for the semiconductor package are also disclosed. The lead frame includes a paddle, a plurality of tie bars for supporting the corners of the paddle, a plurality of leads arranged at each of four sides or two facing sides of the paddle in such a fashion that they are spaced apart from an adjacent side of the paddle while extending perpendicularly to the associated side of the paddle, each of the leads having lead separation preventing means adapted to increase a bonding force of the lead to a resin encapsulate subsequently molded to encapsulate the lead frame for fabrication of the semiconductor package, and dam bars for supporting the leads and the tie bars. Additional package embodiments include exposed protrusions extending downward from the leads. The exposed protrusions are irradiated with a laser to remove set resin prior to a solder ball attachment step.

Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant

A mounting for a package containing a semiconductor chip is disclosed, along with methods of making such a mounting. The mounting includes a substrate having a mounting surface with conductive traces thereon, and an aperture extending through the substrate. The package includes a base, such as a leadframe or a laminate sheet, and input/output terminals. A chip is on a first side of the base and is electrically connected (directly or indirectly) to the input/output terminals. A cap, which may be a molded encapsulant, is provided on the first side of the base over the chip. The package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in the aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the mounting surface. Because the cap is within the aperture, a height of the package above the mounting surface is minimized.

Mounting for a package containing a chip

Integrated circuit device packages and substrates for making the packages are disclosed. One embodiment of a substrate includes a planar sheet of polyimide having a first surface, an opposite second surface, and apertures between the first and second surfaces. A planar metal die pad and planar metal are attached to the second surface of the polyimide sheet. The apertures in the polyimide sheet are juxtaposed to the leads. A package made using the substrate includes an integrated circuit device mounted above the first surface of the polyimide sheet opposite the die pad. Bond wires are connected between the integrated circuit device and the leads through the apertures in the polyimide sheet. An encapsulant material covers the first surface of the polyimide sheet, the integrated circuit device, the bond wires, and the apertures. The die pad and leads are exposed at an exterior surface of the package.

Integrated circuit device packages and substrates for making the packages

A lead frame for a surface mount semiconductor chip package includes a die attach paddle and leads, the die attach paddle having down bond attachment sites on an upper surface of the paddle near a peripheral margin of the paddle, and having a central die attach region on an upper surface of the paddle, wherein a portion of the upper surface of the paddle is recessed. In some embodiments the recessed portion of the upper surface of the paddle includes the die attach region, and in other embodiments the recessed portion of the upper surface of the paddle includes a groove. Also, a lead frame surface mount chip package including such a lead frame.

Koo H. Lee

Papers

Plastic semiconductor package