L. Berrojo

Bio: L. Berrojo is an academic researcher from Alenia Aeronautica. The author has contributed to research in topics: Fault tolerance & VHDL. The author has an hindex of 5, co-authored 11 publications receiving 194 citations. Previous affiliations of L. Berrojo include Alcatel-Lucent.

New Techniques for Speeding-Up Fault-Injection Campaigns

Abstract: Fault-tolerant circuits are currently required in several major application sectors, and a new generation of CAD tools is required to automate the insertion and validation of fault-tolerant mechanisms. This paper outlines the characteristics of a new fault-injection platform and its evaluation in a real industrial environment. The fault-injection platform is mainly used for assessing the correctness and effectiveness of the fault tolerance mechanisms implemented within ASIC and FPGA designs. The platform works on register transfer-level VHDL descriptions which are then synthesized, and is based on commercial tools for VHDL parsing and simulation. It also details techniques devised and implemented within the platform to speed-up fault-injection campaigns. Experimental results are provided, showing the effects of the different techniques, and demonstrating that they are able to reduce the total time required by fault-injection campaigns by at least one order of magnitude.

Multispectral and Hyperspectral Lossless Compressor for Space Applications (HyLoC): A Low-Complexity FPGA Implementation of the CCSDS 123 Standard

Abstract: An efficient compression of hyperspectral images on-board satellites is mandatory in current and future space missions in order to save bandwidth and storage space. Reducing the data volume in space is a challenge that has been faced with a twofold approach: to propose new highly efficient compression algorithms; and to present technologies and strategies to execute the compression in the hardware available on-board. The Consultative Committee for Space Data Systems (CCSDS), a consortium of the major space agencies in the world, has recently issued the CCSDS 123 standard for multispectral and hyperspectral image (MHI) compression, with the aim of facilitating the inclusion of on-board compression on satellites by the space industry. In this paper, we present a low-complexity feld programmable gate arrays (FPGAs) implementation of this recent CCSDS 123 standard, which demonstrates its main features in terms of compression efficiency and suitability for an implementation on the available on-board technologies. A hardware architecture is conceived and designed with the aim of achieving low hardware occupancy and high performance on a space-qualified FPGA from the Microsemi RTAX family. The resulting FPGA implementation is therefore suitable for on-board compression. The effect of the several CCSDS-123 configuration parameters on the compression efficiency and hardware complexity is taken into consideration to provide flexibility in such a way that the implementation can be adapted to different application scenarios. Synthesis results show a very low occupancy of 34% and a maximum frequency of 43 MHz on a space-qualified RTAX1000S. The benefits of the proposed implementation are further evidenced by a demonstrator, which is implemented on a commercial prototyping board from Xilinx. Finally, a comparison with other FPGA implementations of on-board data compression algorithms is provided.

An industrial environment for high-level fault-tolerant structures insertion and validation

Abstract: When designing a VLSI circuits, most of the efforts are now performed at levels of abstractions higher than gate. Correspondingly to this clear trend, there is a growing request to tackle safety-critical issues directly at the RT-level. This paper presents a complete environment for considering safety issues at the RT level. The environment was implemented and tested by an industry for devising a sample safety-critical device. Designers were permitted to assess the effects of transient faults, automatically add fault-tolerant structures, and validate the results working on the same circuit descriptions and acting in a coherent framework. The evaluation showed the effectiveness of the proposed environment.

Supporting fault tolerance in an industrial environment: the AMATISTA approach

Abstract: AMATISTA is a European IST project whose main target is the development of a fault tolerant (FT) set of tools. These include an automatic FT Insertion (FTI) tool and a FT injection and simulation (FTIS) tool. This paper presents the AMATISTA project from a user perspective. FT experience and current non-automatic techniques and methodologies used in Alcatel Espacio (AEO) are described. The advantages of having tools for automatic FTI and FT injection and simulation are summarised. The AEO requirements for both tools are also described.

VHDL virtual prototyping

Abstract: Prototyping has been used to develop electronic systems for a long time. In this work a new prototyping approach, that we named VHDL Virtual Prototyping, is introduced. The new approach introduces VHDL models as the hardware part of the system prototype. The software components of the system are then executed and debugged on top of the hardware models of the system. A platform for developing electronic systems using VHDL Virtual Prototyping is presented. The enhancement of this approach for mechatronics is also introduced.

Advances in Hyperspectral Image and Signal Processing: A Comprehensive Overview of the State of the Art

Abstract: Recent advances in airborne and spaceborne hyperspectral imaging technology have provided end users with rich spectral, spatial, and temporal information. They have made a plethora of applications feasible for the analysis of large areas of the Earth?s surface. However, a significant number of factors-such as the high dimensions and size of the hyperspectral data, the lack of training samples, mixed pixels, light-scattering mechanisms in the acquisition process, and different atmospheric and geometric distortions-make such data inherently nonlinear and complex, which poses major challenges for existing methodologies to effectively process and analyze the data sets. Hence, rigorous and innovative methodologies are required for hyperspectral image (HSI) and signal processing and have become a center of attention for researchers worldwide.

Statistical fault injection: quantified error and confidence

Abstract: Fault injection has become a very classical method to determine the dependability of an integrated system with respect to soft errors. Due to the huge number of possible error configurations in complex circuits, a random selection of a subset of potential errors is usual in practical experiments. The main limitation of such a selection is the confidence in the outcomes that is never quantified in the articles. This paper proposes an approach to quantify both the error on the presented results and the confidence on the presented interval. The computation of the required number of faults to inject in order to achieve a given confidence and error interval is also discussed. Experimental results are shown and fully support the presented approach.

A Survey on Fault Injection Techniques

Abstract: Fault tolerant circuits are currently required in several major application sectors. Besides and in complement to other possible approaches such as proving or analytical modeling whose applicability and accuracy are significantly restricted in the case of complex fault tolerant systems, fault-injection has been recognized to be particularly attractive and valuable. Fault injection provides a method of assessing the dependability of a system under test. It involves inserting faults into a system and monitoring the system to determine its behavior in response to a fault. Several fault injection techniques have been proposed and practically experimented. They can be grouped into hardware-based fault injection, software-based fault injection, simulation-based fault injection, emulation-based fault injection and hybrid fault injection. This paper presents a survey on fault injection techniques with comparison of the different injection techniques and an overview on the different tools.

Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation

Abstract: This is a comprehensive guide to fault injection techniques used to evaluate the dependability of a digital system. The description and the critical analysis of different fault injection techniques and tools are authored by key scientists in the field of system dependability and fault tolerance.

Autonomous Fault Emulation: A New FPGA-Based Acceleration System for Hardness Evaluation

Abstract: The appearance of nanometer technologies has produced a significant increase of integrated circuit sensitivity to radiation, making the occurrence of soft errors much more frequent, not only in applications working in harsh environments, like aerospace circuits, but also for applications working at the earth surface. Therefore, hardened circuits are currently demanded in many applications where fault tolerance was not a concern in the very near past. To this purpose, efficient hardness evaluation solutions are required to deal with the increasing size and complexity of modern VLSI circuits. In this paper, a very fast and cost effective solution for SEU sensitivity evaluation is presented. The proposed approach uses FPGA emulation in an autonomous manner to fully exploit the FPGA emulation speed. Three different techniques to implement it are proposed and analyzed. Experimental results show that the proposed Autonomous Emulation approach can reach execution rates higher than one million faults per second, providing a performance improvement of two orders of magnitude with respect to previous approaches. These rates give way to consider very large fault injection campaigns that were not possible in the past