Lanny L. Parker

Bio: Lanny L. Parker is an academic researcher from Codex Corporation. The author has contributed to research in topics: Voltage-controlled oscillator & Phase-locked loop. The author has an hindex of 9, co-authored 12 publications receiving 234 citations.

Voltage controlled oscillator operating with digital controlled loads in a phase lock loop

Abstract: A phase lock loop (16) operates independent of temperature and process variation by digitally loading a VCO (22) until reaching the desired operating frequency. The VCO reaches a high output frequency even under worst case processing by controlling multiple current mirrors (162-166, 174-180, 182-188) to increase inverter switching current without slowing the response of the VCO to changes in loop node voltage. An Initialize-to-VDD circuit (32) sets the loop node voltage to V DD so that the load control circuit need only increase loading to slow down the VCO to the desired operating frequency. A frequency range detector (34) monitors the output frequency of the VCO and passes control signals to a load control circuit to (36) activate digital loads (38) and slow down the VCO to the desired operating frequency.

Circuit and method of controlling a VCO with capacitive loads

Abstract: A phase lock loop operates independent of temperature and process variation by digitally loading a VCO until reaching the desired operating frequency. The VCO reaches a high output frequency even under worst case processing by controlling multiple current mirrors to increase inverter switching current without slowing the response of the VCO to changes in loop node voltage. An Initialize-to-VDD circuit sets the loop node voltage to V DD so that the load control circuit need only increase loading to slow down the VCO to the desired operating frequency. A frequency range detector monitors the output frequency of the VCO and passes control signals to a load control circuit to activate digital loads and slow down the VCO to the desired operating frequency.

Voltage controlled oscillator having 50% duty cycle clock

Abstract: A voltage controlled oscillator (VCO) generates a 50% duty cycle clock. The 50% duty cycle clock is derived directly from the operating frequency of the VCO thereby abating the need for the VCO to operate at twice the desired clock frequency. This allows the VCO to be utilized in high frequency phase-locked loop systems.

CMOS input buffer accepting TTL level inputs

Abstract: A Complementary Metal Oxide Semiconductor (CMOS) input buffer circuit is provided which accepts Transistor-Transistor Lock (TTL) input signal levels without generating any significant DC current path. A reference voltage circuit (1, FIG. 1) provides first and second reference voltages (V A and V B , FIG. 1) which are coupled to first and second stages, respectively, of the input buffer circuit (3, FIG. 1), and which are of predetermined magnitudes and scaled relative to each other to permit the P-channel devices of the input buffer circuit to turn off completely when the input to the circuit is "high", while allowing a successively higher output at each successive stage of the input buffer circuit. The reference circuit 1 is compensated for power supply and process window variations.

Power on reset circuit having hysteresis inverters

Abstract: A power on reset circuit uses a first inverter with hysteresis operating in response to a first power supply potential to develop a first reset signal when the first power supply potential is greater than a first predetermined threshold. A second inverter with hysteresis also operates in response to the first power supply potential for developing a second reset signal when the first power supply potential is greater than a second predetermined threshold. The first reset signal disables the second inverter until the first power supply potential reaches the first predetermined threshold. A delay circuit delays the second reset signal to ensure the first power supply potential is fully operational before indicating a ready condition.

Radio frequency data communications device

Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Thermal and power management for computer systems

Abstract: Improved approaches to providing thermal and power management for a computing device are disclosed. These approaches facilitate intelligent control of a processor's clock frequency and/or a fan's speed so as to provide thermal and/or power management for the computing device.

Temperature management for integrated circuits

Abstract: A system for controlling temperature buildup in an IC (55) employs a temperature sensor (67) to provide an indication of the IC temperature (75) to a control circuit (65) which is configured to provide an operational clock rate (85) to the IC (55) which is less than the system clock rate (83), based on a function of the temperature (75) of the IC or its package In one embodiment temperature sensors (67, 69, 71, 73) are implemented as solid-state circuitry within different functional areas of a single IC, such as a microprocessor In other embodiments, operating voltage (93) is lowered as operating frequency (85) is lowered In yet another embodiment temperature sensing of multiple processors (55, 57, 59, 61) in a system is provided to a controller (65) or controllers which are configured to allocate workload between the processors as a means to limit temperature rise, as well as to lower operational clock rate (85, 87, 89, 91) and to lower operating voltage (93, 95, 97, 99)

Methods and apparatus for thermal management of an integrated circuit die

Abstract: An integrated, on-chip thermal management system providing closed-loop temperature control of an IC device and methods of performing thermal management of an IC device. The thermal management system comprises a temperature detection element, a power modulation element, a control element, and a visibility element. The temperature detection element includes a temperature sensor for detecting die temperature. The power modulation element may reduce the power consumption of an IC device by directly lowering the power consumption of the IC device, by limiting the speed at which the IC device executes instructions, by limiting the number of instructions executed by the IC device, or by a combination of these techniques. The control element allows for control over the behavior of the thermal management system, and the visibility element allows external devices to monitor the status of the thermal management system.

Method and apparatus for programmable thermal sensor for an integrated circuit

Abstract: A programmable thermal sensor is implemented in an integrated circuit such as a microprocessor. The programmable thermal sensor monitors the temperature of the integrated circuit, and generates an output to indicate that the temperature of the integrated circuit has attained a pre-programmed threshold temperature. In a microprocessor implementation, the microprocessor contains a processor unit, an internal register, microprogram and clock circuitry. The microprogram writes programmable input values, corresponding to threshold temperatures, to the internal register. The programmable thermal sensor reads the programmable input values, and generates an interrupt when the temperature of the microprocessor reaches the threshold temperature. In addition to a programmable thermal sensor, the microprocessor contains a fail safe thermal sensor that halts operation of the microprocessor when the temperature attains a critical temperature.