L
Larry Pileggi
Researcher at Carnegie Mellon University
Publications - 398
Citations - 14804
Larry Pileggi is an academic researcher from Carnegie Mellon University. The author has contributed to research in topics: Equivalent circuit & Logic gate. The author has an hindex of 66, co-authored 384 publications receiving 14180 citations. Previous affiliations of Larry Pileggi include University of Pittsburgh & University of Texas at Austin.
Papers
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Journal ArticleDOI
PRIMA: passive reduced-order interconnect macromodeling algorithm
TL;DR: In this article, an algorithm for generating provably passive reduced-order N-port models for linear RLC interconnect circuits is described, in which, in addition to macromodel stability, passivity is needed to guarantee the overall circuit stability.
Proceedings ArticleDOI
Exploring regular fabrics to optimize the performance-cost trade-off
Larry Pileggi,Herman Schmit,Andrzej J. Strojwas,P. Gopalakrishnan,Veerbhan Kheterpal,Aneesh Koorapaty,C. Patel,Vyacheslav Rovner,K. Y. Tong +8 more
TL;DR: Some of the trade-offs to consider for determination of how much regularity a particular IC or application can afford are discussed, and a Via Patterned Gate Array is proposed as one such example.
Proceedings ArticleDOI
Design methodology for IC manufacturability based on regular logic-bricks
Veerbhan Kheterpal,Vyacheslav Rovner,Thiago Hersan,D. Motiani,Y. Takegawa,Andrzej Strojwas,Larry Pileggi +6 more
TL;DR: A full-mask-set design methodology is proposed which provides the same physical design coherence as a configurable array, but with area and other design benefits comparable to standard cell ASICs.
Proceedings ArticleDOI
An architectural exploration of via patterned gate arrays
TL;DR: This work investigates the architecture of a Via Patterned Gate Array (VPGA), focusing primarily on the optimal lookup table (LUT) size; and a comparison the crossbar and switch block routing architectures.
Proceedings ArticleDOI
Maximization of layout printability/manufacturability by extreme layout regularity
TL;DR: It will be shown that with a small set of Boolean functions and careful selection of lithography friendly patterns, the performance of logic built upon regular fabrics can surpass that of seemingly more arbitrarily constructed logic.