Larry Rudolph

Bio: Larry Rudolph is an academic researcher from New York University. The author has contributed to research in topics: MIMD & Shared memory. The author has an hindex of 5, co-authored 7 publications receiving 498 citations. Previous affiliations of Larry Rudolph include Courant Institute of Mathematical Sciences & University of Illinois at Urbana–Champaign.

The Nyu Ultracomputer Designing a MIMD Shared Memory Parallel Machine

Abstract: The design for the NYU ultracomputer, a shared-memory MIMD parallel machine composed of thousands of autonomous processing elements is presented. This machine uses an enhanced message switching network with the geometry of an omega-network to approximate the ideal behaviour of Schwartz's paracomputer model of computation and to implement efficiently the important fetch-and-add synchronisation primitive. The hardware which would be required to build a 4096 processor system using 1990s technology is outlined. System software issues are discussed and analytic studies of the network performance are presented. A sample of efforts to implement and simulate parallel variants of important scientific programs is included. 37 references.

The NYU Ultracomputer—designing a MIMD, shared-memory parallel machine (Extended Abstract)

Abstract: We present the design for the NYU Ultracomputer, a shared-memory MIMD parallel machine composed of thousands of autonomous processing elements. This machine uses an enhanced message switching network with the geometry of an Omega-network to approximate the ideal behavior of Schwartz's paracomputer model of computation and to implement efficiently the important fetch-and-add synchronization primitive. We outline the hardware that would be required to build a 4096 processor system using 1990's technology. We also discuss system software issues, and present analytic studies of the network performance. Finally, we include a sample of our effort to implement and simulate parallel variants of important scientific programs.

Issues related to MIMD shared-memory computers: the NYU ultracomputer approach

Abstract: We present an updated report on the NYU Ultracomputer design emphasizing recent results on programming, operating systems, caching, demand paging, and I/O. The user's view of the Ultracomputer is presented along with the hardware and software implementation. Freedom from serial bottlenecks in both hardware and software allows the Ultracomputer to obtain performance that scales nearly linearly in the size of the machine for a broad spectrum of problems.

Computer Architecture, Fifth Edition: A Quantitative Approach

Abstract: The computing world today is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation today. The Fifth Edition of Computer Architecture focuses on this dramatic shift, exploring the ways in which software and technology in the "cloud" are accessed by cell phones, tablets, laptops, and other mobile computing devices. Each chapter includes two real-world examples, one mobile and one datacenter, to illustrate this revolutionary change. Updated to cover the mobile computing revolutionEmphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next")Includes three review appendices in the printed text. Additional reference appendices are available online.Includes updated Case Studies and completely new exercises.

The design and analysis of parallel algorithms

Abstract: Kurskod: 5DV050 Inrättad: 2008-03-31 Inrättad av: teknisk-naturvetenskapliga fakultetsnämnden Reviderad: 2012-02-29 Reviderad av: teknisk-naturvetenskapliga fakultetsnämnden Kursplan giltig från: 2012, vecka 10 Ansvarig enhet: Inst för datavetenskap SCB-ämnesrubrik: Informatik/Dataoch systemvetenskap Huvudområden och successiv fördjupning: Beräkningsteknik: Avancerad nivå, har endast kurs/er på grundnivå som förkunskapskrav (A1N) , Datavetenskap: Avancerad nivå, har endast kurs/er på grundnivå som förkunskapskrav (A1N) Betygsskala: För denna kurs ges betygen 5 Med beröm godkänd, 4 Icke utan beröm godkänd, 3 Godkänd, VG Väl godkänd, G Godkänd, U Underkänd Utbildningsnivå: Avancerad nivå

Vector models for data-parallel computing

Abstract: "Vector Models for Data-Parallel Computing "describes a model of parallelism that extends and formalizes the Data-Parallel model on which the Connection Machine and other supercomputers are based. It presents many algorithms based on the model, ranging from graph algorithms to numerical algorithms, and argues that data-parallel models are not only practical and can be applied to a surprisingly wide variety of problems, they are also well suited for very-high-level languages and lead to a concise and clear description of algorithms and their complexity. Many of the author's ideas have been incorporated into the instruction set and into algorithms currently running on the Connection Machine.The book includes the definition of a parallel vector machine; an extensive description of the uses of the scan (also called parallel-prefix) operations; the introduction of segmented vector operations; parallel data structures for trees, graphs, and grids; many parallel computational-geometry, graph, numerical and sorting algorithms; techniques for compiling nested parallelism; a compiler for Paralation Lisp; and details on the implementation of the scan operations.Guy E. Blelloch is an Assistant Professor of Computer Science and a Principal Investigator with the Super Compiler and Advanced Language project at Carnegie Mellon University.Contents: Introduction. Parallel Vector Models. The Scan Primitives. Computational-Geometry Algorithms. Graph Algorithms. Numerical Algorithms. Languages and Compilers. Correction-Oriented Languages. Flattening Nested Parallelism. A Compiler for Paralation Lisp. Paralation-Lisp Code. The Scan Vector Model. Data Structures. Implementing Parallel Vector Models. Implementing the Scan Operations. Conclusions. Glossary.

The Performance of Multistage Interconnection Networks for Multiprocessors

Abstract: This paper studies the performance of unbuffered and buffered, packet-switching, multistage interconnection networks. We begin by reviewing the definition of banyan networks and introducing some generalizations of them. We then present an asymptotic analysis of the performance of unbuffered banyan networks, thereby solving a problem left open by Patel. We analyze the performance of the unbuffered generalized banyan networks, and compare networks with approximately equivalent hardware complexity. Finally, we analyze the performance of buffered banyan networks and again compare networks with approximately equivalent hardware complexity.

Scans as primitive parallel operations

Abstract: A study of the effects of adding two scan primitives as unit-time primitives to PRAM (parallel random access machine) models is presented. It is shown that the primitives improve the asymptotic running time of many algorithms by an O(log n) factor, greatly simplifying the description of many algorithms, and are significantly easier to implement than memory references. It is argued that the algorithm designer should feel free to use these operations as if they were as cheap as a memory reference. The author describes five algorithms that clearly illustrate how the scan primitives can be used in algorithm design: a radix-sort algorithm, a quicksort algorithm, a minimum-spanning-tree algorithm, a line-drawing algorithm, and a merging algorithm. These all run on an EREW (exclusive read, exclusive write) PRAM with the addition of two scan primitives and are either simpler or more efficient than their pure PRAM counterparts. The scan primitives have been implemented in microcode on the Connection Machine system, are available in PARIS (the parallel instruction set of the machine). >