In this paper, resonant tank design procedure and practical design considerations are presented for a high performance LLC multiresonant dc-dc converter in a two-stage smart battery charger for neighborhood electric vehicle applications. The multiresonant converter has been analyzed and its performance characteristics are presented. It eliminates both low- and high-frequency current ripple on the battery, thus maximizing battery life without penalizing the volume of the charger. Simulation and experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 48-72 V dc at 650 W. The prototype achieves a peak efficiency of 96%.

An LLC Resonant DC–DC Converter for Wide Output Voltage Range Battery Charging Applications

This paper proposes two methods of reducing the storage capacitance in the ac/dc power supplies for light emitting diode (LED) lighting. In doing so, film capacitors can be adopted instead of electrolytic capacitors to achieve a long power suppliespsila lifetime. The voltage ripple of the storage capacitor is intentionally increased to reduce the storage capacitance. The method of determining the storage capacitance for ensuring that the boost power factor correction converter operates normally in the whole input voltage range is also discussed. For the purpose of further reducing the storage capacitance, a method of injecting the third harmonic current into the input current flow is proposed. While ensuring that the input power factor is always higher than 0.9 to comply with regulation standards such as ENERGY STAR, the storage capacitance can be reduced to 65.6% of that with an input power factor of 1. A 60-W experimental prototype is built to verify the proposed methods.

Means of Eliminating Electrolytic Capacitor in AC/DC Power Supplies for LED Lightings

In this paper, a new front end ac-dc bridgeless interleaved power factor correction topology is proposed for level II plug-in hybrid electric vehicle (PHEV) battery charging. The topology can achieve high efficiency, which is critical for minimizing the charger size, PHEV charging time and the amount and cost of electricity drawn from the utility. In addition, a detailed analytical model for this topology is presented, enabling the calculation of the converter power losses and efficiency. Experimental and simulation results are included for a prototype boost converter converting universal ac input voltage (85-265 V) to 400 V dc output at up to 3.4 kW load. The experimental results demonstrate a power factor greater than 0.99 from 750 W to 3.4 kW, THD less than 5% from half load to full load and a peak efficiency of 98.9% at 70 kHz switching frequency, 265 V input and 1.2 kW load.

/pdf/a-high-performance-single-phase-bridgeless-interleaved-pfc-227o72aw06.pdf

A High-Performance Single-Phase Bridgeless Interleaved PFC Converter for Plug-in Hybrid Electric Vehicle Battery Chargers

As a key component of a plug-in hybrid electric vehicle (PHEV) charger system, the front-end ac-dc converter must achieve high efficiency and power density. This paper presents a topology survey evaluating topologies for use in front end ac-dc converters for PHEV battery chargers. The topology survey is focused on several boost power factor corrected converters, which offer high efficiency, high power factor, high density, and low cost. Experimental results are presented and interpreted for five prototype converters, converting universal ac input voltage to 400 V dc. The results demonstrate that the phase shifted semi-bridgeless PFC boost converter is ideally suited for automotive level I residential charging applications in North America, where the typical supply is limited to 120 V and 1.44 kVA or 1.92 kVA. For automotive level II residential charging applications in North America and Europe the bridgeless interleaved PFC boost converter is an ideal topology candidate for typical supplies of 240 V, with power levels of 3.3 kW, 5 kW, and 6.6 kW.

Evaluation and Efficiency Comparison of Front End AC-DC Plug-in Hybrid Charger Topologies

Purpose:
In radiotherapy (RT) based on magnetic resonance imaging
(MRI) as
the only modality, the information on electron density must be derived from the
MRI
scan by creating a so-called pseudo computed tomography (pCT). This is a nontrivial
task, since the voxel-intensities in an MRI scan are not uniquely related to electron
density. To solve the task, voxel-based or atlas-based models have typically been
used. The voxel-based models require a specialized dual ultrashort echo time
MRI
sequence for bone visualization and the atlas-based models require deformable
registrations of conventional MRI scans. In this study, we investigate the
potential of a patch-based method for creating a pCT based on conventional
T
1-weighted MRI scans without
using deformable registrations. We compare this method against two
state-of-the-art methods within the voxel-based and atlas-based categories.
Methods:
The data consisted of CT and MRI scans of five
cranial RT patients. To compare the performance of the different methods, a nested
cross validation was done to find optimal model parameters for all the methods.
Voxel-wise and geometric evaluations of the pCTs were done. Furthermore, a
radiologic evaluation based on water equivalent path lengths was carried out,
comparing the upper hemisphere of the head in the pCT and the real CT. Finally,
the dosimetric accuracy was tested and compared for a
photon
treatment plan.
Results:
The pCTs produced with the patch-based method had the best voxel-wise, geometric,
and radiologic agreement with the real CT, closely followed by the atlas-based
method. In terms of the dosimetric accuracy, the patch-based method had average
deviations of less than 0.5% in measures related to target coverage.
Conclusions:
We showed that a patch-based method could generate an accurate pCT based on
conventional T
1-weighted MRI sequences and
without deformable registrations. In our evaluations, the method performed better
than existing voxel-based and atlas-based methods and showed a promising potential
for RT of the brain based only on MRI.

/pdf/patch-based-generation-of-a-pseudo-ct-from-conventional-mri-1opw1pr1n8.pdf

Patch-based generation of a pseudo CT from conventional MRI sequences for MRI-only radiotherapy of the brain.

The discussion concerning the use of single-stage contra two-stage PFC solutions has been going on for the last decade and it continues. The purpose of this paper is to direct the focus back on how the power is processed and not so much as to the number of stages or the amount of power processed. The performance of the basic DC/DC topologies is reviewed with focus on the component stress. The knowledge obtained in this process is used to review some examples of the alternative PFC solutions and compare these solutions with the basic two-stage PFC solution.

/pdf/two-stage-power-factor-corrected-power-supplies-the-low-3t6pigt6mu.pdf

Two-stage power factor corrected power supplies: the low component-stress approach

This paper presents a guide on characterizing state-of-the-art silicon superjunction (SJ) devices in the 600V range for single phase power factor correction (PFC) applications. The characterization procedure is based on a minimally inductive double pulse tester (DPT) with a very low intrusive current measurement method, which enables reaching the switching speed limits of these devices. Due to the intrinsic low and nonlinear capacitances in vertical SJ MOSFETs, special attention needs to be paid to the gate drive design to minimize oscillations and limit the maximum at turn off. This paper investigates the latest SJ devices in order to set a reference for future research on improvement over silicon (Si) attained with the introduction of wide bandgap devices in single phase PFC applications. The obtained results show that the latest generation of SJ devices set a new benchmark for its wide bandgap competitors.

/pdf/ultrafast-switching-superjunction-mosfets-for-single-phase-1a7yicb7w6.pdf

Ultrafast switching superjunction MOSFETs for single phase PFC applications

This work considers an alternative method of reducing the body diode reverse recovery by taking advantage of the MOSFET body effect, and applying a bias voltage to the gate before reverse recovery. A test method is presented, allowing the accurate measurement of voltage and current waveforms during reverse recovery at high di/dt. Different bias voltages and dead times are combined, giving a loss map which makes it possible to evaluate the practical efficacy of gate bias on reducing the MOSFET body diode reverse recovery, while comparing it to the well known methods of dead time optimization. A selection of 60V devices for synchronous rectification are compared for their suitability for gate bias, while a selection of 600V devices are compared for the efficacy of gate bias for the zero voltage transition converter application. The results show that many of the tested devices benefit from greatly reduced reverse recovery after the application of gate bias.

Practical investigation of the gate bias effect on the reverse recovery behavior of the body diode in power MOSFETs

The need for efficient, smaller, lighter and cheaper power supply units drive the investigation of using high switching frequency soft switching resonant converters. This work presents an 88% efficient 48V nominal input converter switching at 6 MHz and output power of 21 Watts achieving power density of 7 W/cm3 for Power-over-Ethernet LED lighting applications. The switching frequency is used to control the output current delivered to the load resistance. The converter was tested using a constant resistance load. The performance and thermal behavior were investigated and reported in this work.

/pdf/high-frequency-soft-switching-half-bridge-series-resonant-dc-3fa7kogk1l.pdf

High frequency soft switching half bridge series-resonant DC-DC converter utilizing gallium nitride FETs

An audio power conversion system (3) comprising a power supply (1) having a positive supply rail (100) and a negative supply rail (200) for supplying power to a single ended class D amplifier (2). The system further comprises a supply pump reduction circuit (6) connected to the supply rails (100, 200) and adapted to redistribute a pumping charge from said power supply by forcing a current-flow from a rail with a higher voltage to a rail with a lower voltage. According to the current invention, the redistribution circuit is arranges to always distribute charge from the rail with the higher voltage. This means that for practical circuits the pump canceling occurs continuously and is not confined to every other cycle as for the prior art.

Lars Press Petersen

Papers

Two-stage power factor corrected power supplies: the low component-stress approach

Ultrafast switching superjunction MOSFETs for single phase PFC applications

Practical investigation of the gate bias effect on the reverse recovery behavior of the body diode in power MOSFETs

High frequency soft switching half bridge series-resonant DC-DC converter utilizing gallium nitride FETs

Audio power conversion system