Laurent Souriau

Bio: Laurent Souriau is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Extreme ultraviolet lithography & Germanium. The author has an hindex of 19, co-authored 72 publications receiving 1256 citations. Previous affiliations of Laurent Souriau include IMEC.

Germanium MOSFET Devices: Advances in Materials Understanding, Process Development, and Electrical Performance

Abstract: 7cm 2 ; however, only a 2 times reduction in junction leakage is observed and no benefit is seen in on-state current. Ge wet etch rates are reported in a variety of acidic, basic, oxidizing, and organic solutions, and modifications of the RCA clean suitable for Ge are discussed. Thin, strained epi-Si is examined as a passivation of the Ge/gate dielectric interface, with an optimized thickness found at 6 monolayers. Dopant species are overviewed. P and As halos are compared, with better short channel control observed for As. Area leakage currents are presented for p/n diodes, with the n-doping level varied over the range relevant for pMOS. Germanide options are discussed, with NiGe showing the most promise. A defect mode for NiGe is reported, along with a fix involving two anneal steps. Finally, the benefit of an end-of-process H2 anneal for device performance is shown.

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories

Abstract: We demonstrate for the first time full-scale integration of top-pinned perpendicular MTJ on 300 mm wafer using CMOS-compatible processes for spin-orbit torque (SOT)-MRAM architectures. We show that 62 nm devices with a W-based SOT underlayer have very large endurance (> 5×1010), sub-ns switching time of 210 ps, and operate with power as low as 300 pJ.

High Quality Ge Virtual Substrates on Si Wafers with Standard STI Patterning

Abstract: Further improving complementary metal oxide semiconductor performance beyond the 22 nm generation likely requires the use ofhigh mobility channel materials, such as Ge for p-type metal oxide semiconductor pMOS and III/V for n-type metal oxidesemiconductor devices. The complementary integration of both materials on Si substrates can be realized with selective epitaxialgrowth. We present two fabrication schemes for Ge virtual substrates using Si wafers with standard shallow trench isolation STI .This reduces the fabrication cost of these virtual substrates as the complicated isolation scheme in blanket Ge can be omitted. Thelow topography enables integration of ultrathin high-

Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM

Abstract: We propose a field-free switching SOT-MRAM concept that is integration friendly and allows for separate optimization of the field component and SOT/MTJ stack properties. We demonstrate it on a 300 mm wafer, using CMOS-compatible processes, and we show that device performances are similar to our standard SOT-MTJ cells: reliable sub-ns switching with low writing power across the 300mm wafer. Our concept/design opens a new area for MRAM (SOT, STT and VCMA) technology development.

Semiconductor device, and manufacturing method thereof

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Current-induced spin-orbit torques in ferromagnetic and antiferromagnetic systems

Abstract: A M was supported by the King Abdullah University of Science and Technology (KAUST) T J acknowledges support from the EU FET Open RIA Grant No 766566, the Ministry of Education of the Czech Republic Grant No LM2015087 and LNSM-LNSpin, and the Grant Agency of the Czech Republic Grant No 19-28375X J S acknowledges the Alexander von Humboldt Foundation, EU FET Open Grant No 766566, EU ERC Synergy Grant No 610115, and the Transregional Collaborative Research Center (SFB/TRR) 173 SPIN+X K G and P G acknowledge stimulating discussions with C O Avci and financial support by the Swiss National Science Foundation (Grants No 200021-153404 and No 200020-172775) and the European Commission under the Seventh Framework Program (spOt project, Grant No 318144) A T acknowledges support by the Agence Nationale de la Recherche, Project No ANR-17-CE24-0025 (TopSky) J Ž acknowledges the Grant Agency of the Czech Republic Grant No 19-18623Y and support from the Institute of Physics of the Czech Academy of Sciences and the Max Planck Society through the Max Planck Partner Group programme

Resistive switching materials for information processing

Abstract: The rapid increase in information in the big-data era calls for changes to information-processing paradigms, which, in turn, demand new circuit-building blocks to overcome the decreasing cost-effectiveness of transistor scaling and the intrinsic inefficiency of using transistors in non-von Neumann computing architectures. Accordingly, resistive switching materials (RSMs) based on different physical principles have emerged for memories that could enable energy-efficient and area-efficient in-memory computing. In this Review, we survey the four physical mechanisms that lead to such resistive switching: redox reactions, phase transitions, spin-polarized tunnelling and ferroelectric polarization. We discuss how these mechanisms equip RSMs with desirable properties for representation capability, switching speed and energy, reliability and device density. These properties are the key enablers of processing-in-memory platforms, with applications ranging from neuromorphic computing and general-purpose memcomputing to cybersecurity. Finally, we examine the device requirements for such systems based on RSMs and provide suggestions to address challenges in materials engineering, device optimization, system integration and algorithm design. Resistive switching materials enable novel, in-memory information processing, which may resolve the von Neumann bottleneck. This Review focuses on how the switching mechanisms and the resultant electrical properties lead to various computing applications.

High-K materials and metal gates for CMOS applications

Abstract: The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current becomes too large. This led to the replacement of SiO2 by a physically thicker layer of a higher dielectric constant or ‘high-K’ oxide such as hafnium oxide. Intensive research was carried out to develop these oxides into high quality electronic materials. In addition, the incorporation of Ge in the CMOS transistor structure has been employed to enable higher carrier mobility and performance. This review covers both scientific and technological issues related to the high-K gate stack – the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging to achieve the thinnest oxide thicknesses. The high K oxides were implemented in conjunction with a replacement of polycrystalline Si gate electrodes with metal gates. The strong metallurgical interactions between the gate electrodes and the HfO2 which resulted an unstable gate threshold voltage resulted in the use of the lower temperature ‘gate last’ process flow, in addition to the standard ‘gate first’ approach. Work function control by metal gate electrodes and by oxide dipole layers is discussed. The problems associated with high K oxides on Ge channels are also discussed.